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Part I: PC2-CamLink Board

PC2-CamLink User's Manual

Configuring Sapera

The Sapera Configuration program (

Start•Programs•DALSA•Sapera

LT•Sapera

Configuration

)

allows the user to see all available Sapera servers for the installed Sapera-compatible boards.

Viewing Installed Sapera Servers

The

System

entry represents the system server. It corresponds to the host machine (your computer)

and is the only server that should be present at all times. As shown in the following screen shoot,
server index 1 is the PC2-CamLink board installed. If required, update the server list by clicking the

Refresh

button.

Summary of Contents for PC2-CamLink

Page 1: ...DALSA 7075 Place Robert Joncas Suite 142 Montreal Quebec Canada H4M 2Z2 http www dalsa com mv OC PC2M CUM00 PC2 CamLink User s Manual Part number OC PC2M CUM00 Edition 2 32 ...

Page 2: ...d herein is understood to be at the user s risk DALSA Corp assumes no liability whatsoever for the use of the products detailed in this document and reserves the right to make changes in specifications at any time and without notice Microsoft is a registered trademark Windows Windows XP Windows Vista and Windows 7 are trademarks of Microsoft Corporation All other trademarks or intellectual propert...

Page 3: ...LLING PC2 CAMLINK HARDWARE AND DRIVER 8 In a Windows XP Windows Vista or Windows 7 System 8 UPGRADING SAPERA OR ANY BOARD DRIVER 9 Board Driver Upgrade Only 9 Sapera and Board Driver Upgrades 10 COM Port Assignment 10 Configuring Sapera 12 IFC SOFTWARE INSTALLATION 15 IFC SDK 15 Configuring Serial Port Under IFC 17 Upgrading Onboard Firmware 20 THEORY OF OPERATION 21 PC2 CamLink Flow Diagram 21 Ca...

Page 4: ... Summary 77 Camera Signal Summary 77 Camera Link Cables 78 PART II SAPERA LT 81 SAPERA SERVER AND PARAMETERS 83 SAPERA SOFTWARE EXAMPLE 93 Grab Demo Overview 93 Using the Grab Demo 94 Using Sapera CamExpert with PC2 CamLink 97 PART III IFC 101 IFC SOFTWARE EXAMPLES 103 IFC Examples for PC2 CamLink 103 PC CAMLINK IFC PARAMETERS COMPARISON 105 Overview 105 PART IV TROUBLESHOOTING AND SUPPORT 113 TRO...

Page 5: ...g onboard firmware configuring the serial port and starting Camera Configurator Theory of Operation Detailing PC2 CamLink features Technical Reference PC2 CamLink specifications Includes connector and pinout diagrams Camera Link Interface Information concerning the Camera Link specification Part II Sapera LT Sapera Server and Parameters Lists the Sapera server available and describes the Sapera pa...

Page 6: ... located at http www dalsa com mv accessed using any web browser Using the Manual File names directories and Internet sites will be in bold text e g image2 bmp c IFC http www dalsa com Text that must be entered using the keyboard will be in typewriter style text e g c temp Menu and dialog actions will be indicated in bold text in the order of the instructions to be executed with each instruction s...

Page 7: ...PC2 CamLink User s Manual Part I PC2 CamLink Board 3 Part I PC2 CamLink Board ...

Page 8: ...4 Part I PC2 CamLink Board PC2 CamLink User s Manual ...

Page 9: ...s the components and part numbers for the PC2 CamLink Item Part Number Board PC2 CamLink OC PC20 C0000 Cables Accessories Camera Link Video Input Cable optional product 1 meter OC COMC CLNK0 2 meter OC COMC CLNK6 Optional Cable Floppy power connector connects to J14 OC COMC POW03 Parallel I O connector to female D sub 25 bracket assembly connects to J8 4816 Documentation PC2 CamLink User s manual ...

Page 10: ...6 Part I PC2 CamLink Board PC2 CamLink User s Manual EC FCC Certificate of Conformity ...

Page 11: ...CI expansion slot is available PC2 CamLink is compatible with either 5V or 3 3V PCI slots Confirm that you are using Windows XP Windows Vista or Windows 7 Other versions of Windows or non Microsoft operating systems are not supported Configuration Jumpers PC2 CamLink is equipped with two type of jumpers Opto coupler jumper Camera power jumper The opto coupler jumper includes four connectors divide...

Page 12: ...ccess to the expansion slot area Install the PC2 CamLink into a free PCI slot Close the computer chassis and turn the computer on Driver installation requires administrator rights for the current user of the computer Windows will find the PC2 CamLink and start its Found New Hardware Wizard Click on the Cancel button to close the Wizard Application Insert the DALSA Sapera CD ROM If AUTORUN is enabl...

Page 13: ...river Upgrade Only Minor upgrades to acquisition board drivers are typically distributed as ZIP files available in the DALSA web site http www dalsa com Board driver revisions are also available on the next release of the Sapera CD ROM Often minor board driver upgrades do not require a new revision of Sapera To confirm that the current Sapera version will work with the new board driver Check the n...

Page 14: ...e Driver click Remove and then in the InstallShield dialog click on Remove to uninstall the board driver From the Windows start menu select Start Control Panel Add or Remove Programs Select the DALSA Sapera LT program click Remove and then in the InstallShield dialog click on Remove to uninstall Sapera Reboot the computer and logon the computer as an administrator again Install the new versions of...

Page 15: ... serial port mapped to COM3 in this example is available as a serial port to any serial port application for camera control Note that this serial port is not listed in the Windows Control Panel System Properties Device Manager because it is a logical serial port mapping ...

Page 16: ...apera servers for the installed Sapera compatible boards Viewing Installed Sapera Servers The System entry represents the system server It corresponds to the host machine your computer and is the only server that should be present at all times As shown in the following screen shoot server index 1 is the PC2 CamLink board installed If required update the server list by clicking the Refresh button ...

Page 17: ...erates any out of memory error while allocating host frame buffers You can approximate the amount of contiguous memory required as follows Calculate the total amount of host memory used for frame buffers number of frame buffers number of pixels per line number of lines 2 if buffer is 10 or 12 bits Provide 1MB for every 256MB of host frame buffer memory required Add an additional 1MB if the frame b...

Page 18: ...ffers allocated as a single contiguous memory block typical limitations are one third of the total system memory with a maximum limit of approximately 100MB Click on Buffer under General Options in the Grab Demo Main Window see page 95 to select from a list of host buffer memory allocation types Contiguous Memory for Sapera Messaging The current value for Sapera messaging determines the total amou...

Page 19: ... CD ROM Select on Next after auto start initiates and the Welcome window appears Read the Information window and select Next if you are not required to make adjustments to your system If adjustments are necessary select Cancel then make adjustments and re install Imaging Studio CD ROM Select Yes after reading the Software License Agreement Enter your name and company in the User Information window...

Page 20: ...view and print manuals installed with the Imaging Studio CD ROM Select Yes if you do not already have Acrobat Reader installed in your system Select Yes or No after the window appears asking to view readme files The Service Pack Update Check window is displayed This allows you to check for an IFC service pack update via the DALSA web site Note that you need an active Internet connection Select Yes...

Page 21: ...M Port application tool is used to assign the COM Port Run the program from the Windows Start menu Start Programs IFC version 5 8 Tools Set Board Com Port The Set Image Capture Board Uart ComX Port window appears The PC2 CamLink board s appear s in the Select Board window See screenshot below To assign a standard COMx name to PC2 CamLink ...

Page 22: ...ct Setup Example Using HyperTerminal Run HyperTerminal and type a name for the new connection when prompted click OK Select the COM Port you want to connect with within the following dialog screen In this example the PC2 CamLink serial port was previously mapped to COM3 by the IFC Serial Port Configuration program HyperTerminal opens a dialog box where the COM Port properties are configured see sc...

Page 23: ...iming and control parameters entered Run the program from the Windows Start menu Start Programs IFC version 5 8 IFC Camera Configurator The live acquisition window is an important tool within Camera Configurator It performs immediate verification on timing or control parameters without the need to run a separate acquisition program An overview on how to use the Camera Configurator is available via...

Page 24: ...nder IFC Start Programs IFC 5 8 0 0 Tools CorBoardUpdate for PC2 CamLink Firmware Update displays a list of all products it supports as shown in the following screenshot To update all supported products click Yes and all PC2 CamLinks currently installed within the computer will be updated with the latest firmware available within the installation CDROM A progress window is then displayed showing t...

Page 25: ...n unknown board state because of incomplete board analysis A gray icon indicates the board needs to be updated with the latest firmware A green icon is displayed when the board is up to date A red icon represents an error during the analysis or update phase Theory of Operation PC2 CamLink Flow Diagram The following diagram represents the sequence and components in which the data acquired from the ...

Page 26: ...erial Port y y 1 Base CameraLink areascan or line scan 1 or 2 channel s 8 to 16 bit per pixel 1 LUT for each CameraLink port Generator Creates region of interest ROI Optionally converts to 16 bit padded YCrCb for display y Scatter gather engine that grabs into host logical memory minimizing CPU usage y 32 bit 33 MHz high speed PCI interface 5V and 3 3V PCI Controller To PCI bus y y 1 or 2 channel ...

Page 27: ...y data and only are used to increase bandwidth above the 20MHz limit Typically DVAL is not used in your camera configuration file if the camera clock is above 20MHz SPR is the spare input defined by the Camera Link specification This input is reserved for future use by the Camera Link standard The Camera Link transmission clock is recovered from the Camera Link interface Sapera Parameters for FVAL...

Page 28: ... U X Figure 2 MUX Sapera Parameters for Camera Control Selection CC pins are easily controlled from CamExpert under the Advanced Control Parameters tab Each CC can take five different values 1 Not Used keep previous state 2 High 3 Low 4 Pulse 0 PRIN 5 Pulse 1 EXSYNC IFC IFC Parameters for Camera Control Selection CL2_CAM_CTL1_SIGNAL CL2_CCTL_FIXED_LOW CL2_CCTL_FIXED_HIGH CL2_CCTL_EXSYNC CL2_CCTL_P...

Page 29: ...lay from trigger event up to 65 seconds Programmable duration up to 65 seconds Timer granularity is 1µs when the delay and duration values are below 65ms Granularity falls to 1ms for delay or duration above 65ms Delay and duration always have the same granularity Each timer for area scan can be started on the following trigger events Opto1 or Opto2 trigger pins LVDS1 or LVDS2 trigger pins SW trigg...

Page 30: ...1_DURATION Size of pulse CORACQ_PRM_TIME_INTEGRATE_PULSE1_POLARITY CORACQ_VAL_ACTIVE_LOW CORACQ_VAL_ACTIVE_HIGH Note Sapera also supports Camera Reset and Camera Trigger methods Refer to the Sapera Acquisition Parameters Reference manual for more information In CamExpert these parameters are found under the Advanced Control Parameters tab Select one of the camera control methods camera reset camer...

Page 31: ... CORACQ_PRM_TIME_INTEGRATE_PULSE0_DELAY Pulse offset from trigger event CORACQ_PRM_TIME_INTEGRATE_PULSE0_DURATION Size of pulse CORACQ_PRM_TIME_INTEGRATE_PULSE0_POLARITY CORACQ_VAL_ACTIVE_LOW CORACQ_VAL_ACTIVE_HIGH Note Sapera also support Camera Reset methods and Camera Trigger methods Refer to the Sapera Acquisition Parameters Reference manual for more information In CamExpert these parameters a...

Page 32: ... falling edge of the trigger source fires the total of the specified number of frames captured Active High Frames are captured as long as the trigger source is active high on the rising edge of FVAL Active Low Frames are captured as long as the trigger source is active low on the rising edge of FVAL The incoming trigger pulse is passed through a debounce circuit to ensure that no glitch would be d...

Page 33: ...al trigger and the user circuitry using separate grounds This galvanic isolation prevents ground loops and protects both circuits A jumper selectable resistor is connected in serial fashion to the opto coupler to limit the current Both opto coupled triggers allow serial resistor selection that is used to limit the current flowing through the diode This is seen in the following tables OPTO1 Jumper ...

Page 34: ...t converts the voltage to current and into the LED is therefore crucial to the performance of the opto coupler If the current flowing through the LED is too small the emitted light will not turn the transistor ON HPCL 0531 is the typical opto coupler on the PC2 CamLink It is designed for high speed TTL TTL applications A standard 16mA TTL sink current through the input LED will provide enough outp...

Page 35: ... 15 pin 1 DB 15 pin 9 Opto trigger 2 DB 15 pin 2 DB 15 pin 10 LVDS LVDS Low Voltage Differential Signaling uses low voltage dual wire systems running 180 apart This enables noise to travel at the same level which in turn can get filtered out more easily and effectively Two LVDS trigger inputs are available on PC2 CamLink for a total of 4 pins These inputs are typically implemented using the Nation...

Page 36: ... Area scan Trigger P_TRIGGER_ENABLE IFC_DISABLE IFC_ENABLE P_TRIGGER_POLARITY IFC_FALLING_EDGE IFC_RISING_EDGE IFC_POL_ACTIVE_HIGH IFC_POL_ACTIVE_LOW P_GEN_SW_TRIGGER 0 1 P_TRIGGER_DEBOUNCE Debounce duration P_FRAMES_PER_TRIGGER Number of frames to acquire per trigger CL2_FRAME_TRIG_SRC CL2_SOFT_FRAME_TRIG CL2_OPTO_FRAME_TRIG1 CL2_OPTO_FRAME_TRIG2 CL2_LVDS_FRAME_TRIG1 CL2_LVDS_FRAME_TRIG2 CL2_FREQ...

Page 37: ...er is any pulse edge from either shaft encoder signal After a trigger the two following triggers are ignored as defined by a trigger drop count parameter K D D K D D K D D K D D K D D Shaft Encoder phase A Shaft Encoder phase B K Keep D Drop or Skip Note in this example number of triggers to drop 2 Line acquired Figure 7 Shaft Encoder Two LVDS pins on the DB 15 connector provide access to phase A ...

Page 38: ...the LVDS RS422 input will be detected as a logic high or low relative to the input The TTL shaft encoder ground the bias voltage ground and the PC2 CamLink computer system ground must be connected together LVDS RS422 Input Bias Source Generation 330 220 5V 2V 680 100 12V 1 5V 1 5V Battery 3 Examples on Generating a DC voltage for the LDVS Input DC voltage for the LVDS RS422 input can be generated ...

Page 39: ...lar to area scan triggers virtual frame triggers can use the opto coupler trigger inputs the LVDS trigger inputs or a SW trigger PC2 CamLink supports variable frame length where a stop event indicates the end of the virtual frame before the virtual frame buffer is filled Note that if the stop event arrives after the virtual frame is filled this late stop event will be discarded and the next virtua...

Page 40: ...sition from the edge of Opto1 up to the edge of Opto2 Acquisition waits for next start trigger if virtual frame is filled LVDS1 rising or falling edge No A whole virtual frame acquired on LVDS1 edge detection LVDS1 active high or active low Yes Acquisition from the first edge up to the second edge of LVDS1 Acquisition waits for next trigger if virtual frame is filled Start pulse on LVDS1 stop puls...

Page 41: ...R_DETECTION CORACQ_VAL_RISING_EDGE CORACQ_VAL_FALLING_EDGE CORACQ_VAL_ACTIVE_LOW CORACQ_VAL_ACTIVE_HIGH CORACQ_VAL_DOUBLE_PULSE_RISING_EDGE CORACQ_VAL_DOUBLE_PULSE_FALLING_EDGE CORACQ_PRM_EXT_FRAME_TRIGGER_LEVEL CORACQ_VAL_LEVEL_TTL CORACQ_VAL_LEVEL_LVDS CORACQ_PRM_EXT_FRAME_TRIGGER_SOURCE 0 for automatic defaults to trigger input 1 except for variable frame length with start stop pulse where star...

Page 42: ...IFC Parameters for Virtual Frames Triggers P_VFRAME_TRIGGER_ENABLE IFC_DISABLE IFC_ENABLE P_VFRAME_TRIGGER_POLARITY IFC_FALLING_EDGE IFC_RISING_EDGE IFC_POL_ACTIVE_HIGH IFC_POL_ACTIVE_LOW P_GEN_SW_TRIGGER 0 1 P_VFRAME_TRIGGER_DEBOUNCE Debounce duration P_VFRAME_TRIG_SOURCE CL2_SOFT_TRIG CL2_OPTO_VFRAME_TRIG1 CL2_OPTO_VRAME_STARTTRIG1_STOPTRIG2 CL2_LVDS_VFRAME_TRIG1 CL2_LVDS_VFRAME_STARTTRIG1_STOPT...

Page 43: ...OBE_ENABLE TRUE CORACQ_PRM_STROBE_METHOD CORACQ_VAL_STROBE_METHOD_1 CORACQ_PRM_STROBE_POLARITY CORACQ_VAL_ACTIVE_LOW CORACQ_VAL_ACTIVE_HIGH CORACQ_PRM_STROBE_DELAY Pulse offset from trigger event CORACQ_PRM_STROBE_DURATION Pulse duration CORACQ_PRM_STROBE_LEVEL CORACQ_VAL_LEVEL_TTL In CamExpert these parameters are located under Advanced Control Parameters Select Strobe Method Setting IFC Under IF...

Page 44: ...or diagram Basically the strobe pulse is asserted from the first FVAL following the trigger This mode is often used with free running cameras Slow Strobe Ext Trigger FVAL Strobe Strobe delay Strobe duration Figure 12 Slow Strobe IFC parameters for Strobe P_STROBE_ENABLE IFC_ENABLE P_STROBE_MODE IFC_FAST_STROBE IFC_SLOW_STROBE P_STROBE_POLARITY IFC_ACTIVE_HIGH IFC_ACTIVE_LOW P_STROBE_DELAY Pulse of...

Page 45: ...API IFC IFC parameters for Serial Port P_COM_PORT_NAME String that specifies serial port name P_COM_PORT_BYTESIZE IFC_COM_7BITS IFC_COM_8BITS P_COM_PORT_BAUDRATE IFC_BAUD_4800 IFC_BAUD_9600 IFC_BAUD_14400 IFC_BAUD_19200 IFC_BAUD_38400 IFC_BAUD_56000 IFC_BAUD_57600 IFC_BAUD_115200 IFC_BAUD_128000 P_COM_PORT_PARITY IFC_NOPARITY IFC_ODDPARITY IFC_EVEN_PARITY P_COM_PORT_STOPBITS IFC_ONE_STOPBIT IFC us...

Page 46: ...specification defines the 24 bit input as three bytes Port A Port B and Port C Port A is the least significant byte LSB and Port C is the most significant byte MSB This assignment is easily understood for 8 bit input With single tap or single channel cameras even 10 12 and 16 bit inputs are fairly simple Confusion begins with the assignment of 10 bit and 12 bit 2 tap or two channel cameras The Dat...

Page 47: ... stop pulses Input LUT A different LUT is assigned to all three Camera Link ports port A port B and port C The LUT operates at the resolution of 8 bits in and 8 bits out Note that it cannot operate on pixel sizes above 8 bits The LUT can be used for point transfers as well as thresholding Note ILUT appears before the data port sequencer In other words pixels above 8 bits have not yet been reformat...

Page 48: ...nsfer images to the host in the normal raster scan format for processing or display Re sequencing is performed in realtime without host processor intervention Typical multi channel image re sequencing consists of reordering odd and even pixel sequences odd or even lines or segmented scans The PC2 CamLink Data Port Sequencer has the ability to promote 10 bit 12 bit and 14 bit pixels to 16 bits It o...

Page 49: ...pixels are interleaved in the original image The figure below odd even pixels shows where the data appears in a line from the original image PC2 CamLink can support this format for pixel depths from 8 bits up to 12 bits The IFC Software Library calls this Two Channel Interleaved or CL2_2CHAN_INTERLEAVED A B A B A B Odd even pixels Dual Channel with Line Segments One channel A carries the left half...

Page 50: ...ine B Even or CL2_2TAP_INTERLINE_A_EVEN and CL2_2TAP_INTERLINE_B_EVEN A B B A A Even B Even Interline Sapera parameters for Data Port Sequencer Table CORACQ_PRM_TAPS 1 2 CORACQ_PRM_TAP_OUTPUT CORACQ_VAL_TAP_OUTPUT_SEGMENTED CORACQ_VAL_TAP_OUTPUT_ALTERNATE CORACQ_VAL_TAP_OUTPUT_PARALLEL CORACQ_PRM_TAP_1_DIRECTION CORACQ_VAL_TAP_DIRECTION_LR CORACQ_VAL_TAP_DIRECTION_UD CORACQ_VAL_TAP_DIRECTION_FROM_...

Page 51: ...a window from the incoming image This window is represented by a rectangle where the upper left corner is set by horizontal and vertical offset from the start of valid video and the rectangle size by width and height parameters See diagram below Note that image widths must be a multiple of four bytes because of transfer restrictions on the PCI bus Horizontal offset Vertical offset Width Height Win...

Page 52: ... geometry requires two additional parameters to identify the number of active and inactive pixels per channel P_HORZ_INACTIVE Number of inactive pixel per channel after LVAL only used in 2 channel segmented P_HORZ_ACTIVE Number of active pixel per channel only used in 2 channel segmented YCrCb Engine The YCrCb Engine converts an 8 bit monochrome image into a 16 bit padded YCrCb image to display in...

Page 53: ...ctical capacity is generally around 60 80MB per second and is highly dependant upon your PCI chipset In general 1 If the required bandwidth is smaller than 60MB per second it should be acceptable for most PC systems available on the marketplace today 2 If the required bandwidth has a range between 60MB per second to 80MB per second precaution must be considered towards the system s chipset quality...

Page 54: ...ee that the line averaged bandwidth reaches 70MB per second This is acceptable if the PC2 CamLink gets installed in a system with a chipset of good quality Case 2 Line size higher than 4KB When the camera line size exceeds 4KB the peak bandwidth concept has to be used to compute the camera bandwidth and once again see if it respects the PCI bus bandwidth capabilities Bpp channel data nb PClk bandw...

Page 55: ...amera 10 12 14 or 16 bits pixel and then set Pixel Size to 8 2 Dynamically in an application call CICamera SetAcqParam P_CAM_PIXEL_SIZE camPixelSize where camPixelSize is the nominal pixel size of the camera and call CICamera SetAcqParam P_ PIXEL_SIZE 8 Bus Master Devices on PCI Bus Bandwidth improvements can be obtained by simply removing PCI devices that consume a lot of PCI bus cycles because t...

Page 56: ...Fast 15 Hz Grabbing The TRIG LED represents the status of the selected external trigger pin This is based on the signals going through the DB 15 connector The TRIG LED is also used to indicate an error condition Possible LED states are explained in table below TRIG LED State Trigger State OFF No trigger detected Blinking Green Triggers at a slow rate detected one blink per trigger Static Green Tri...

Page 57: ...STROBE_I is programmable STROBE_O Output strobe signal is an output line under software control I O_INT Interrupt input line that can be used to generate an interrupt programmable edge Refer to J8 Parallel I O 26 Pin Dual Row Connector on page 70 for the connector pinout information The Parallel I O is backward compatible with PC2 Vision and has the ability to provide power to an external box Two ...

Page 58: ... m_pGioOutput new SapGio SapLocation PC2 CamLink_1 0 m_pGioOutput Create m_pGioOutput SetPinConfig dwBitScan SapGio PinOutput m_pGioOutput SetPinState 0 SapGio PinHigh Note Sapera LT 5 0 does not support the input strobe and output strobe pins CamExpert does not provide direct access to the I O It must be activated programmatically from your Sapera application using the SapGio class IFC IFC Suppor...

Page 59: ...quisition stage Trigger Interrupt Start of Capture End of Capture End of PCI Transfer The following block diagram illustrates the acquisition process and indicates at which stage each interrupt occurs Acq Engine FIFO Memory Trigger Camera Start of Capture End of Capture End of PCI transfer PCI Controller Host Memory Figure 15 Acquisition Interrupts IFC Under IFC an interrupt event object is create...

Page 60: ...t of the acquisition process In IFC this is represented by CL2_INTR_SOT In Sapera this is represented by CORACQ_VAL_EVENT_TYPE_EXTERNAL_TRIGGER PC2 CamLink is equipped with a debounce circuit that allows the user to define the minimum acceptable pulse width programmatically Note There is no Start of Trigger interrupt for a software trigger This particular interrupt is only asserted for a pulse on ...

Page 61: ...For reasons of performance each Start of Capture interrupt is only enabled if a user function has been registered to process them End of Capture The End of Capture interrupt family is asserted when capture is complete and data transferred to onboard FIFO memory End of Frame An End of Frame interrupt is generated when the last pixel from the image has been acquired and transferred to onboard FIFO m...

Page 62: ... applications use the CICamera class GrabWaitFrameEx member function in order to wait for the end of transfer to host memory Timing Diagrams The following diagram illustrates the exact location in time for each of the interrupts previously described Note 1 Start of line interrupt is not illustrated but occurs on each rising edge of LVAL Note 2 End of N lines interrupt illustrated for N 5 lines TRI...

Page 63: ...may affect the PC2 CamLink s PCI controller Another possible cause could be a high bandwidth camera PC2 CamLink supports pixel clocks up to 66 MHz with up to two channels and up to 12 bits per channel The resulting bandwidth might easily exceed the PCI maximum of 132MB second The Window Generator can be used as well as truncating pixels to 8 bits to reduce the bandwidth Error on Pixel Clock The Er...

Page 64: ...to image reliability model fuses together all the elements required to acquire images so that a central unit manages them coherently These elements include among others I O to control timing to the camera and error notification Whenever PC2 CamLink detects a problem the user application is immediately informed and can take appropriate action to return to normal operation PC2 CamLink offers this ro...

Page 65: ...mage reliability features on the PC2 CamLink Features Descriptions Characteristics Supported by PC2 CamLink Acquisition Deterministic Camera Control Trigger input to strobe output delay Yes EXSYNC Alignment digital Aligned to the first occurrence of HD after trigger input N A Aligned immediately with trigger input instantaneous capture Yes Double pulse integration control on a single pin Yes Strob...

Page 66: ...etected and operating correctly Flashing green Yes A valid trigger has been detected Valid trigger Yes Indicates if the soft fuse is open Camera power overload Yes Events Trigger event Indicates that a trigger occurred object in place Yes Start of acquisition Data is being acquired from the camera Yes End of acquisition Acquisition is complete Yes Start of transfer Data is being transferred to the...

Page 67: ...igger Rejection If two triggers are detected in less than a minimum time the second trigger is rejected and an error event is generated No Circular Buffer Management Subsequent capture in next empty buffer Yes Trash buffer if circular list is full Yes Sapera LT Data Overrun This condition occurs when data becomes corrupted during the acquisition and transfer process An error event is generated and...

Page 68: ... bit 33MHz 3 3V 5V Trigger Controller OptoCoupler LVDSReceiv er LVDS Strobe Trigger Opto 1 Shaf t Encoder 1 Shaf t Encoder 2 5V 12V Camera Power GND NotConnected factorydefault ILUT CamLink Receiv er LVDS UART Visual Status LED 4 4 Data Camera Control Tx Rx Acquisition Trigger CamLink MDR 26 Base Connector DB 15 Connector 26 Pin Header LED LED Trigger Opto 2 Trigger LVDS 1 Trigger LVDS 2 TTLDriv e...

Page 69: ...aved pixels 2 channel interlines 2 channel half line segmented left to right Pixel Format 8 10 12 14 16 bit 10 12 14 bit pixels promoted to 16 bit 10 12 14 16 bit pixels optionally truncated to 8 bit Pixel rate up to 66 MHz Controls Support for EXSYNC and PRIN on any of the four Camera Control CC line SW selectable 2 Trigger inputs SW selectable with debounce circuit supports 2 Opto or 2 LVDS or 2...

Page 70: ... mapped as regular Windows COM PORT Miscellaneous 2 Visual Status LED indicators Acquisition and Trigger Software Supported by Sapera LT Sapera Processing IFC MVTools Sherlock WiT VixN Camera Configurator Windows XP Windows Vista and Windows 7 Application development using Microsoft Visual C C DLLs or Visual Basic System Requirements Intel Pentium III class CPU 128MB system memory 30MB free hard d...

Page 71: ...J13 J3 J6 J4 J5 J11 J9 LED 2 LED 3 LED 4 LED 5 LED 6 Figure 18 Component View revison A0 PC2 CamLink Component View revision A1 J8 J14 PCI Bus PC2 CamLink J2 J1 LED 1 J13 J3 J6 J4 J5 J11 J9 LED 2 LED 3 LED 4 LED 5 LED 6 Figure 19 Component View revison A1 Important Revision A1 is different only in the orientation of J8 Pin one is on the upper right side of the pin connector ...

Page 72: ...Data 2 21 BASE_X3 Input Neg Base Data 3 8 BASE_X3 Input Pos Base Data 3 22 BASE_XCLK Input Neg Base Clock 9 BASE_XCLK Input Pos Base Clock 20 SERTC Output Neg Serial Data to Camera 7 SERTC Output Pos Serial Data to Camera 19 SERTFG Input Neg Serial Data to Frame Grabber 6 SERTFG Input Pos Serial Data to Frame Grabber 18 CC1 Output Neg Camera Control 1 5 CC1 Output Pos Camera Control 1 17 CC2 Outpu...

Page 73: ...ge up to 25V signals or TTL signals Configurable through a jumper Must be grounded when in TTL mode 4 LVDS Trigger1 Input Positive line of first LVDS trigger signal 11 LVDS Trigger1 Input Negative line of first LVDS trigger signal 5 LVDS Trigger2 Input Positive line of second LVDS trigger signal 12 LVDS Trigger2 Input Negative line of second LVDS trigger signal 6 Shaft Encoder ChA Input Positive l...

Page 74: ...gure 21 Opto coupler Jumper Selection J8 Parallel I O 26 Pin Dual Row Connector Pin Identification as Viewed From Component Side Board Revision A0 2 1 4 3 24 23 26 25 Board Revision A1 25 26 23 24 3 4 1 2 Header Pin Signal name Description Cable 4816 Connector Pin 1 GND Digital ground 1 3 GND Digital ground 2 5 GND Digital ground 3 7 GND Digital ground 4 9 IN1 Digital Input pin 1 5 11 IN3 Digital ...

Page 75: ...put pin 4 19 14 IN6 Digital Input pin 6 20 16 5V 5V power output 21 18 OUT1 Digital Output pin 1 22 20 OUT3 Digital Output pin 3 23 22 OUT5 Digital Output pin 5 24 24 OUT7 Digital Output pin 7 25 26 n c no connection n a J9 Reserved J11 Start Mode Default Mode Shunt jumper is installed Safe Mode Shunt jumper is removed if any problems occurred while updating the PC2 CamLink firmware With the jumpe...

Page 76: ...nected to J14 a shorting jumper on J13 selects either no voltage 5V or 12V for the camera power supply The voltage supply is dependent on jumper configuration See diagram below for J13 jumper configuration selection top board edge top board edge top board edge no voltage connect 5V connect 12V OR OR Figure 22 Power to Camera Voltage Selector ...

Page 77: ...g diodes on the front bracket LED1 The top diode gives useful information concerning the state of acquisition The bottom diode gives useful information concerning the state of the trigger The following tables list the correspondence between the state of the top diode and the state of acquisition and the bottom diode and the state of the trigger Acquisition LED State Acquisition State OFF Fatal car...

Page 78: ...erload and Safe Mode J14 PC2 CamLink LED 2 LED 3 LED 4 LED 5 LED 6 Figure 25 Visual Status of Supplemental LEDs The table below specifies each LED and the result of its activation Description Result LED2 1 5A Overload Too much current drawn by the camera from the floppy connector LED3 Host 12V Overload Too much current drawn by the camera from the PCI connector Connect power floppy cable LED4 Safe...

Page 79: ...t Operating System Support Windows XP Windows Vista and Windows 7 PC2 CamLink Physical Dimensions Approximately 6 675 length 4 2 width 16 95 cm L 10 67 cm W standard PCI half slot card Power Requirements Typical Maximum 5 volts 3A 5A 12 volts 120mA 250mA 12 volts 120mA 250mA Environment Ambient Temperature 0 to 55 C operation 40 to 125 C storage Relative Humidity 5 to 95 non condensing operating 0...

Page 80: ...http en wikipedia org wiki Camera_Link Rights and Trademarks Note The following text is extracted from the Camera Link Specification 1 1 January 2004 The Automated Imaging Association AIA as sponsor of the Camera Link committee owns the U S trademark registration for the Camera Link logo as a certification mark for the mutual benefit of the industry The AIA will issue a license to any company memb...

Page 81: ...uration Table A single Camera Link port is defined as having an 8 bit data word The Full specification supports eight ports labeled as A to H Configuration Ports Supported PC2 CamLink Connector Used Base A B C J1 Medium A B C D E F J1 J2 Full A B C D E F G H J1 J2 Camera Signal Summary Video Data Four enable signals are defined as FVAL Frame Valid FVAL is defined HIGH for valid lines LVAL Line Val...

Page 82: ...pairs have been allocated for asynchronous serial communication to and from the camera and frame grabber Cameras and frame grabbers should support at least 9600 baud SerTFG Differential pair with serial communications to the frame grabber SerTC Differential pair with serial communications to the camera The serial interface protocol is 1 start bit 1 stop bit no parity and no handshaking Camera Link...

Page 83: ...PC2 CamLink User s Manual Part I PC2 CamLink Board 79 ...

Page 84: ......

Page 85: ...PC2 CamLink User s Manual Part II Sapera LT 81 Part II Sapera LT ...

Page 86: ...82 Part II Sapera LT PC2 CamLink User s Manual ...

Page 87: ..._FREQ_MIN 1 Hz CORACQ_PRM_CAM_NAME Default Area Scan CORACQ_PRM_CAM_RESET_DURATION min 1 µs max 65535000 µs step 1 µs CORACQ_PRM_CAM_RESET_METHOD CORACQ_VAL_CAM_RESET_METHOD_1 0x1 CORACQ_PRM_CAM_RESET_POLARITY CORACQ_VAL_ACTIVE_LOW 0x1 CORACQ_VAL_ACTIVE_HIGH 0x2 CORACQ_PRM_CAM_TIME_INTEGRATE_DURATION_MAX 65535000 µs CORACQ_PRM_CAM_TIME_INTEGRATE_DURATION_MIN 1 µs CORACQ_PRM_CAM_TRIGGER_DURATION mi...

Page 88: ...ALSE CORACQ_PRM_DATA_VALID_POLARITY CORACQ_VAL_ACTIVE_HIGH 0x2 CORACQ_PRM_DETECT_HACTIVE Not available CORACQ_PRM_DETECT_PIXEL_CLK Not available CORACQ_PRM_DETECT_VACTIVE Not available CORACQ_PRM_FIELD_ORDER CORACQ_VAL_FIELD_ORDER_NEXT_FIELD 0x4 CORACQ_PRM_FRAME CORACQ_VAL_FRAME_PROGRESSIVE 0x2 CORACQ_PRM_FRAME_INTEGRATE_METHOD Not available CORACQ_PRM_FRAME_INTEGRATE_POLARITY Not available CORACQ...

Page 89: ... max 65535000 µs step 1 µs CORACQ_PRM_LINE_INTEGRATE_PULSE1_POLARITY CORACQ_VAL_ACTIVE_LOW 0x1 CORACQ_VAL_ACTIVE_HIGH 0x2 CORACQ_PRM_LINE_TRIGGER_DELAY min 0 µs max 65535000 µs step 1 µs CORACQ_PRM_LINE_TRIGGER_DURATION min 1 µs max 65535000 µs step 1 µs CORACQ_PRM_LINE_TRIGGER_METHOD CORACQ_VAL_LINE_TRIGGER_METHOD_1 0x1 CORACQ_PRM_LINE_TRIGGER_POLARITY CORACQ_VAL_ACTIVE_LOW 0x1 CORACQ_VAL_ACTIVE_...

Page 90: ...Q_VAL_TAP_DIRECTION_LR 0x1 CORACQ_VAL_TAP_DIRECTION_UD 0x4 CORACQ_VAL_TAP_DIRECTION_FROM_TOP 0x10 CORACQ_PRM_TAP_OUTPUT CORACQ_VAL_TAP_OUTPUT_ALTERNATE 0x1 CORACQ_VAL_TAP_OUTPUT_SEGMENTED 0x2 CORACQ_VAL_TAP_OUTPUT_PARALLEL 0x4 CORACQ_PRM_TAPS min 1 tap max 2 taps step 1 tap CORACQ_PRM_TIME_INTEGRATE_METHOD CORACQ_VAL_TIME_INTEGRATE_METHOD_1 0x1 CORACQ_VAL_TIME_INTEGRATE_METHOD_2 0x2 CORACQ_VAL_TIM...

Page 91: ... 1 line max 8192 lines step 1 line CORACQ_PRM_VBACK_INVALID min 0 line max 16777215 lines step 1 line CORACQ_PRM_VBACK_PORCH Not available CORACQ_PRM_VFRONT_INVALID min 0 line max 16777215 lines step 1 line CORACQ_PRM_VFRONT_PORCH Not available CORACQ_PRM_VIDEO CORACQ_VAL_VIDEO_MONO 0x1 CORACQ_PRM_VIDEO_LEVEL_MAX Default 0 µV CORACQ_PRM_VIDEO_LEVEL_MIN Default 0 µV CORACQ_PRM_VIDEO_STD CORACQ_VAL_...

Page 92: ...ailable CORACQ_PRM_CONTRAST Not available CORACQ_PRM_CONTRAST_BLUE Not available CORACQ_PRM_CONTRAST_GREEN Not available CORACQ_PRM_CONTRAST_RED Not available CORACQ_PRM_CROP_HEIGHT min 1 line max 16384 lines for 2 channels 8192 for 1 channel step 1 line CORACQ_PRM_CROP_LEFT min 0 pixel max 16384 pixels for 2 taps 8192 for 1 tap step 1 pixel CORACQ_PRM_CROP_TOP min 0 line max 16384 lines for 2 cha...

Page 93: ...Q_PRM_EXT_LINE_TRIGGER_SOURCE 0 Use phase A and B of shaft encoder input 1 Use phase A only of shaft encoder input CORACQ_PRM_EXT_TRIGGER_DETECTION CORACQ_VAL_ACTIVE_LOW 0x1 CORACQ_VAL_ACTIVE_HIGH 0x2 CORACQ_VAL_RISING_EDGE 0x4 CORACQ_VAL_FALLING_EDGE 0x8 CORACQ_PRM_EXT_TRIGGER_DURATION min 0 µs max 255 µs step 1 µs CORACQ_PRM_EXT_TRIGGER_ENABLE CORACQ_VAL_EXT_TRIGGER_OFF 0x1 CORACQ_VAL_EXT_TRIGGE...

Page 94: ...ARD 0x1 CORACQ_PRM_LUT_ENABLE TRUE FALSE CORACQ_PRM_LUT_FORMAT Default CORACQ_VAL_OUTPUT_FORMAT_MONO8 CORACQ_PRM_LUT_MAX 1 CORACQ_PRM_LUT_NENTRIES 256 entries CORACQ_PRM_LUT_NUMBER Default 0 CORACQ_PRM_MASTER_MODE Not available CORACQ_PRM_MASTER_MODE_HSYNC_POLARITY Not available CORACQ_PRM_MASTER_MODE_VSYNC_POLARITY Not available CORACQ_PRM_OUTPUT_FORMAT CORACQ_VAL_OUTPUT_FORMAT_MONO8 CORACQ_VAL_O...

Page 95: ...vailable CORACQ_PRM_SNAP_COUNT Default 1 frame CORACQ_PRM_STROBE_DELAY min 0 µs max 65535000 µs step 1 µs CORACQ_PRM_STROBE_DELAY_2 min 0 µs max 65535000 µs step 1 µs CORACQ_PRM_STROBE_DURATION min 1 µs max 65535000 µs step 1 µs CORACQ_PRM_STROBE_ENABLE TRUE FALSE CORACQ_PRM_STROBE_LEVEL CORACQ_VAL_LEVEL_TTL 0x1 CORACQ_PRM_STROBE_METHOD CORACQ_VAL_STROBE_METHOD_1 0x1 CORACQ_PRM_STROBE_POLARITY COR...

Page 96: ...O_PIXEL_CLK 0x40000000 CORACQ_VAL_EVENT_TYPE_FRAME_LOST 0x8000 CORACQ_VAL_EVENT_TYPE_DATA_OVERFLOW 0x4000 CORACQ_PRM_LABEL CameraLink Base Mono 1 CORACQ_PRM_SIGNAL_STATUS CORACQ_VAL_SIGNAL_PIXEL_CLK_PRESENT 0x4 TRANSFER PARAMETERS Values CORXFER_PRM_EVENT_TYPE CORXFER_VAL_EVENT_TYPE_END_OF_FRAME 0x00800000 CORXFER_VAL_EVENT_TYPE_START_OF_FRAME 0x00080000 CORXFER_VAL_EVENT_TYPE_END_OF_LINE 0x010000...

Page 97: ... This program demonstrates the basic acquisition functions included in the Sapera library The program allows you to acquire images either in continuous or in one shot mode while adjusting acquisition parameters The program code can be extracted for use within your own application Remarks Grab Demo was built using Visual C 6 0 by means of the MFC library and is based on the Sapera standard API and ...

Page 98: ...ected server CCF File Selection The Acquisition Configuration window is also used to select the camera configuration file required for the connected camera Sapera camera files contain timing parameters and video conditioning parameters The default folder used for camera configuration files is also used by the CamExpert utility to save user generated or modified camera files Use Sapera CamExpert to...

Page 99: ...ab Demo Main Window The main window provides control buttons and a central region where the grabbed image is displayed Developers can use the source code supplied with the demo as a foundation to quickly create and test the desired imaging application ...

Page 100: ...is not applicable to the PC2 CamLink Composite Conditioning Offers Brightness and Contrast controls Load CAM VIC Opens the dialog window Acquisition Parameters allowing the user to load a new set of camera files This is the same window displayed when the Sapera Acquisition Demo is first started Acquisition Control Grab Displays live digitized video from your video source If your source is a camera...

Page 101: ...d in off screen video memory and uses the display adapter hardware to perform a fast copy from video memory to video memory Type Overlay The frame buffer is allocated in video memory where the display adapter overlay hardware uses color keying to view the overlay buffer Format Shows frame buffer pixel formats as supported by the hardware and camera files used Using Sapera CamExpert with PC2 CamLin...

Page 102: ...Expert The central section of CamExpert provides access to the various Sapera parameters of PC2 CamLink It is divided into five tabs Basic Timing Parameters Basic parameters are used to define the timing of the camera This includes the vertical horizontal and pixel clock frequency This tab is sufficient to configure a free running camera Advanced Control Parameters Advanced parameters are used to ...

Page 103: ...amming the frame grabber acquisition hardware for the camera in use Sapera LT 5 0 introduces a new camera configuration file CCF that combines the CCA and CVI files into one file Typically a camera application will use a CCF file per camera operating mode or one CCA file in conjunction with several CVI files where each CVI file defines a specific camera operating mode An application can also have ...

Page 104: ...within the file Activates and sets any supported camera control mode or control variable Defines the integration mode and duration Defines the strobe output control Allocates the frame grabber transfer ROI the host video buffer size and buffer type RGB888 RGB101010 MONO8 MONO16 Configuration of line frame trigger parameters such as source internal via the frame grabber external via some outside ev...

Page 105: ...PC2 CamLink User s Manual Part III IFC 101 Part III IFC ...

Page 106: ...102 Part III IFC PC2 CamLink User s Manual ...

Page 107: ...ndows Desktop Start Program IFC Version 5 8 PC2 CamLink Examples The table below lists the PC2 CamLink examples PC2 CamLink Examples Interrupt Demonstrates how to use interrupts available on PC2 CamLink Sequential Snap Snaps a small number of images into host memory and replays them Interrupt Title Interrupt Description Shows how to register to interrupts available on PC2 CamLink Camera trigger se...

Page 108: ...a small number of images into host memory and replays them Demonstrates how to use LUT Parallel I O and other PC2 CamLink features Features Uses CL2TEST TXT for configuration Snaps a short sequence of frames to host memory and replays this sequence Camera and port selection Camera control for external trigger frame reset and strobe Overlay demonstration LUT demonstration Window Generator dialog Pa...

Page 109: ...equivalent functionality on their respective board For a complete description of each parameter refer to the IFC SDK Software Manual Camera Timing Inputs PC CamLink Param Values PC2 CamLink Param Values MAIN GROUP P_LEN_POLARITY IFC_FALLING_EDGE FC_RISING EDGE P_LEN_POLARITY IFC_RISING_EDGE P_FEN_ENABLE IFC_DISABLE IFC_ENABLE P_FEN_ENABLE IFC_DISABLE IFC_ENABLE P_FEN_POLARITY IFC_FALLING_EDGE IFC_...

Page 110: ...ze 0 069842 microseconds CL2_EXT_SYNC_ACTIVE_TIME Float range parameter min 1us max 65535000us step size 1us LNK_EXSYNC_MODE LNK_EXSYNC_FREE_RUNNING LNK_EXSYNC_TRIG1 LNK_EXSYNC_TRIG2 LNK_EXSYNC_SOFT_TRIG LNK_EXSYNC_SOFT_TRIG2 LNK_EXSYNC_VB_TRIG External trigger source selects the reference for EXSYNC LNK_EXT_SYNC_PERIOD_TIME Range 0 34921 to 1 87481e 007 ms step size 0 069842 microseconds Use CL2_...

Page 111: ...ers PC CamLink Param Values PC2 CamLink Param Values MAIN GROUP LNK_IMAGE_GEOMETRY LNK_1CHAN_L2R LNK_2CHAN_INTERLEAVED LNK_2CHAN_SEP_TAP_L2R LNK_2CHAN_SEP_TAP_R2L LNK_4CHAN_SEP_TAP_L2R LNK_2CHAN_SEP_TAP_CONVERGE LNK_2TAP_INTERLINE_A_EVEN LNK_2TAP_INTERLINE_B_EVEN LNK_3CHAN_SEP_TAP_L2R LNK_USER_DEFINED_GEO CL2_IMAGE_GEOMETRY CL2_1CHAN_L2R CL2_2CHAN_INTERLEAVED CL2_2CHAN_SEP_TAP_L2R CL2_2TAP_INTERLI...

Page 112: ... Parameters PC CamLink Param Values PC2 CamLink Param Values MAIN GROUP P_TRIGGER_STATE IFC_LEVEL_LOW IFC_LEVEL_HIGH No equivalent on PC2 CamLink P_GEN_SW_TRIGGER 1 P_GEN_SW_TRIGGER Integer range parameter min 0 max 1 step size 1 LNK_TRIG_DIVIDE_CONTROL LNK_DISABLE_TRIG_DIVIDE LNK_DIVIDE_TRIG_0 LNK_DIVIDE_TRIG_1 Use CL2_LINE_TRIG_DROP_COUNT FRAME TRIGGER GROUP Only available if P_FEN_ENABLE is ena...

Page 113: ...CH_DETECTOR IFC_DISABLE IFC_ENABLE P_VFRAME_TRIGGER_DEBOUNCE Integer range parameter min 0 max 255 step size 1μs P_TRIGGER_SRC LNK_TRIG_START_EVENT LNK_TRIG_STOP_EVENT LNK_DIFFERENTIAL_TRIG LNK_TTL_TRIG LNK_OPTO_COUPLED_TRIG LNK_TMODE_DISABLE LNK_TMODE_HWTRIG0_ASSERT LNK_TMODE_HWTRIG0_DEASSE RT LNK_TMODE_HWTRIG1_ASSERT LNK_TMODE_HWTRIG1_DEASSE RT LNK_TMODE_SWTRIG0 LNK_TMODE_SWTRIG1 LNK_TMODE_DISAB...

Page 114: ...lines step size 1 line RGB cameras not supported LNK_SPATIAL_LEAD_COLOR IFC_RED IFC_GREEN IFC_BLUE RGB cameras not supported Serial Port Parameters PC CamLink Param Values PC2 CamLink Param Values P_COM_PORT_NAME a string P_COM_PORT_NAME a string P_COM_PORT_BYTESIZE IFC_COM_4BITS IFC_COM_5BITS IFC_COM_6BITS IFC_COM_7BITS IFC_COM_8BITS P_COM_PORT_BYTESIZE IFC_COM_7BITS IFC_COM_8BITS P_COM_PORT_BAUD...

Page 115: ...LE IFC_ENABLE No strobe on PC CamLink P_STROBE_MODE IFC_FAST_STROBE IFC_SLOW_STROBE No strobe on PC CamLink P_STROBE_POLARITY IFC_ACTIVE_HIGH IFC_ACTIVE_LOW No strobe on PC CamLink P_STROBE_DELAY Integer range parameter min 0us max 65535000us step size 1us No strobe on PC CamLink P_STROBE_DURATION Integer range parameter min 10us max 65535000us step size 1us ...

Page 116: ...112 Part III IFC PC2 CamLink User s Manual ...

Page 117: ...PC2 CamLink User s Manual Part IV Troubleshooting and Support 113 Part IV Troubleshooting and Support ...

Page 118: ...114 Part IV Troubleshooting and Support PC2 CamLink User s Manual ...

Page 119: ...Start Program DALSA Sapera LT Tools Log Viewer Lists various information warnings and error messages reported by DALSA boards including the PC2 CamLink driver PCI Diagnostics Start Program DALSA Sapera LT Tools PCI Diagnostics Lists all the computer s PCI configuration space registers IFC IFC comes with the following tools to help resolve PC2 CamLink problems Log Viewer Start Programs IFC Version ...

Page 120: ...d log to DALSA Technical support Here is a typical log Saving the PCI Diagnostics Start PCI Diagnostics Select the Save button The dump of PCI configuration file is saved under PCIDUMP TXT Send PCIDUMP TXT to DALSA Technical Support Note that the DALSA PCI Vendor ID is 0x11EC The PC2 CamLink board PCI Device ID is 0x2021 Here is a typical PCI configuration for a PC2 CamLink ...

Page 121: ...n the same machine PC2 CamLink will only work correctly with the last API installed on the machine This ensures the PC2 CamLink driver matches the version of the API you are using This could stem from a hardware failure a PCI problem a plug and play problem a kernel driver problem or a software installation problem You need to have Administrator privileges to install the PC2 CamLink software and t...

Page 122: ...ms in the preceding section you can proceed by validating that the board is correctly registered in Windows and that the associated kernel driver has started Start the Log Viewer tool Check for 1 PC2 CamLink device found in the list of messages as shown in bold below If you do not see this look for error messages identified by ERR at the start of the line Make certain that the memory is mapped suc...

Page 123: ...pc2c inf IFC The PC2C INF file is located in Ifc58 bin win2000 pc2c inf Open Windows Explorer and go the PC2C INF folder Right click on PC2C INF and select Install Board does not grab You can start an application but nothing happens when you start the grab The reported frame rate rests at 0 fps Clues from the Visual Indicators Disconnect the camera cable MDR 26 from the PC2 CamLink The acquisition...

Page 124: ...ate camera control pulse on the appropriate Camera Link CC output pins This is performed through the EXSYNC and PRIN output timers Refer to your camera manufacturer s datasheet Make certain that the camera is configured for the proper mode of operation This must match the camera configuration file Refer to your camera datasheet Most Camera Link cameras can be configured through a serial port inter...

Page 125: ...adian International Sales Office DALSA 7075 Place Robert Joncas Suite 142 Montreal Quebec Canada H4M 2Z2 Tel 514 333 1301 Fax 514 333 1388 US Sales Office DALSA Inc 700 Technology Park Drive Billerica Ma 01821 Tel 978 670 2000 Fax 978 670 2010 Asia Sales Office DALSA Asia Pacific Ikebukuro East 13F 3 4 3 Higashi Ikebukuro Toshima ku Tokyo Japan Tel 81 3 5960 6353 Fax 81 3 5960 6354 ...

Page 126: ...r web site Technical support form via our web page Support requests for imaging product installations Support requests for imaging applications http www dalsa com mv support Camera support information http www dalsa com mv products fgvpdetail aspx partNumber OR PC20 C0000 Product literature and driver updates http www dalsa com mv download ...

Page 127: ... digital camera connection specification a standard data communication protocol and simpler cabling between camera and frame grabber Composite sync Synchronization signals that combines the vertical component video field or frame sync with the horizontal component video line sync Often RGB cameras besides the three color signals have a fourth composite sync CS signal Composite Video A video signal...

Page 128: ...ter that blocks high frequencies and allows lower frequencies to pass through Used to limit undesirable analog information such as high frequency video noise before converting to digital data NTSC National Television Systems Committee Color TV standard used in North America and other countries The interlaced video signal is composed of a total of 525 video lines at a frame rate of 30 Hz PAL Phase ...

Page 129: ...d by 8 bits per color 24 bits pixel Often image data is stored or transferred in 32 bits pixel where the upper 8 bits of each pixel are unused Scatter Gather Host system memory allocated for frame buffers is virtually contiguous but physically scattered throughout all available memory Trigger A mechanism that initiates an action when an event occurs such as synchronizing an image acquisition to an...

Page 130: ...126 Glossary of Terms PC2 CamLink User s Manual ...

Page 131: ...type 118 CameraLink 5 CamExpert 92 95 97 118 capture interrupts 57 CCA 92 Channel Link 76 COM Port 10 18 41 COM Port Assignment 17 computer system required 74 contiguous memory 13 14 95 CVI 92 D DALSA FTP site 97 DALSA web site 97 data port seqencer 44 47 DB 15 connector 7 33 34 39 60 debounce circuit 28 56 DMA 13 driver upgrade 9 D Sub connector 53 DVAL 23 76 dynamic resources 13 E End of Frame i...

Page 132: ...coupler jumper 7 opto coupler voltage 70 out of memory error 13 P paged pool 95 Parallel I O 53 PC2 CamLink components 5 PC2 CamLink Device Driver 15 20 117 PCI bandwidth 49 59 60 118 PCI Diagnostics 113 114 116 PCI Dump 114 PCI expansion slot 7 PCI latency timer 51 PDF 2 Pixel Clock 59 Pixel Clock error 61 plug and play 115 116 117 PRIN 24 25 28 32 118 PRIN signal 26 programmable delay 25 program...

Page 133: ... static resources 13 status LED 72 117 118 strobe 39 T technical support 9 113 114 timer granularity 25 transfer interrupts 58 trigger polarity active high 28 active low 28 falling edge 28 rising edge 28 Trigger To Image Reliability 55 59 60 61 TTL shaft encoder 33 V virtual frame 33 35 58 virtual frame trigger 35 36 37 W Window Generator 47 58 Window XP 14 Windows Logo testing 8 Windows OS memory...

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