PC2-CamLink User's Manual
Part I: PC2-CamLink Board
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Bandwidth Optimization
Pixel Depth Truncation
One of easiest techniques is to transfer only the eight most significant bits when the camera’s pixel
depth is higher than 8-bits. If this compromise is acceptable, this will result in half the bandwidth
required for the full pixel depth. PC2-CamLink has the ability to truncate the digital information to 8-
bits/pixel. Use the following method to enable this feature:
Under Sapera, set image buffer format to 8-bit:
CORACQ_PRM_PIXEL_DEPTH = 10, 12, 14 or 16 bits/pixel
CORACQ_PRM_OUTPUT_FORMAT =
CORACQ_VAL_OUTPUT_FORMAT_MONO8
In CamExpert, the pixel depth is available under the ‘Basic Timing Parameters’ tab.
Select ‘Pixel Depth’. The output format is available under the ‘Image Buffer and AOI
Parameters’. Select ‘Image Buffer Format’.
IFC
Under IFC:
1. Statically, in the Configfile, set the
Cam Pixel Size
parameter to the nominal pixel
size of the camera (10, 12, 14 or 16-bits/pixel) and then set
Pixel Size
to 8.
2. Dynamically, in an application, call CICamera->
SetAcqParam(P_CAM_PIXEL_SIZE,
camPixelSize
) where
camPixelSize
is the
nominal pixel size of the camera and call CICamera->SetAcqParam(P_ PIXEL_SIZE,
8).
Bus Master Devices on PCI Bus
Bandwidth improvements can be obtained by simply removing PCI devices that consume a lot of PCI
bus cycles because the device is often accessed or because the device driver is using a ‘polling’
mechanism for communication.
Moving the VGA card to the AGP bus is a major helping factor for PCI bus traffic alleviation.
Reducing the PCI Latency Timer
The PCI latency timer parameter is part of the PCI configuration space of any PCI device. It specifies
the number of clock cycles a device can continue on the PCI bus once it has been requested by another
device. Most motherboards offer a configurable parameter in the BIOS called the PCI Latency Timer,
the value is in the number of clocks (0 to 255). A lower value will assure a higher bandwidth to the
PC2-CamLink installed within the system since the PC2-CamLink driver increases the PCI latency
timer.
Summary of Contents for PC2-CamLink
Page 7: ...PC2 CamLink User s Manual Part I PC2 CamLink Board 3 Part I PC2 CamLink Board ...
Page 8: ...4 Part I PC2 CamLink Board PC2 CamLink User s Manual ...
Page 10: ...6 Part I PC2 CamLink Board PC2 CamLink User s Manual EC FCC Certificate of Conformity ...
Page 83: ...PC2 CamLink User s Manual Part I PC2 CamLink Board 79 ...
Page 84: ......
Page 85: ...PC2 CamLink User s Manual Part II Sapera LT 81 Part II Sapera LT ...
Page 86: ...82 Part II Sapera LT PC2 CamLink User s Manual ...
Page 105: ...PC2 CamLink User s Manual Part III IFC 101 Part III IFC ...
Page 106: ...102 Part III IFC PC2 CamLink User s Manual ...
Page 116: ...112 Part III IFC PC2 CamLink User s Manual ...
Page 118: ...114 Part IV Troubleshooting and Support PC2 CamLink User s Manual ...
Page 130: ...126 Glossary of Terms PC2 CamLink User s Manual ...