Contec COM-2(PCI), User Manual

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I/O Ports and Registers
COM-2(PCI), COM-4(PCI), COM-8(PCI)
58
Using Interrupts
When in use, the interrupts from all channels are handled via the
same interrupt request line. When an interrupt occurs on a channel,
the interrupt vector register (IVR) is latched.
When an interrupt is received, the interrupt service routine can read
the IVRs to determine which channel generated the interrupt.
After the interrupt service routine starts, the IVR must be read again
before the interrupt service routine returns to check for pending
interrupts.
The ACE has internal registers to enable its own interrupts and to
determine which channel generated an interrupt. For details on
how to use these registers, refer to the 16552 or 16654 data sheet
from Texas Instruments or other manufacturer.
When the power is turned on, the ACE master reset sets the OUT1
signal HIGH. This automatically enables each channel to generate
interrupts. For channels on which interrupts are not used, write
"1" to bit D2 of the modem control register (MCR). (This sets the
OUT1 signal to LOW.) In addition to allowing interrupts to be
enabled independently for each channel, the board has a global
interrupt enable. The global interrupt enable determines whether
to make the PCI bus and selected IRQ line active or not. As the
global interrupt enable is disabled at power-up, it must be enabled
before using the board. To enable, write "1" to bit D7 of the IVR.
Similarly, write "0" to disable.