Technical Description
6–10 DIGITAL PowerStorm 1000 Graphics Subsystem Owner's Guide
6.3.6.1 Raster Control (RC) ASIC
One RC ASIC is mounted on each Video Memory Module in the subsystem. The RC ASIC
supports a full DBus slave interface for direct access of the frame buffer on the Video
Memory Module or for any of the master units on the DBus. The RC also supports up to
two Image Rendering Module input interfaces. Each Image Rendering Module interface
requires 11 bits of X, 11 bits of Y, and 24 bits of RGB. The RC to video memory interface
is a bi-directional 32-bit data, 10-bit address and 19 bits of VRAM control. The main
functions of the RC ASIC are video DRAM control, screen resolution mapping, raster
operations, and BLT.
All software registers in the RC ASIC are loadable via the DBus interface or the Image
Rendering Module interface for pipeline synchronization.
6.3.6.2 Frame Buffer
The PowerStorm 1000 graphics subsystem frame buffer is configurable. The frame buffer
consists of one or two Video Memory Modules. When configured with the Standard
Resolution Module, the frame buffers transfer four pixels out of the frame buffer during
each video RAM shift register read cycle. When configured with the High Resolution
Module, the frame buffers transfer eight pixels out of the frame buffer during each video
RAM shift register read cycle. Table 6-1 identifies the relationship between the number of
Video Memory Modules in the frame buffer and the maximum screen resolutions
supported.
The Frame Buffer Memory is implemented using 4 MByte video RAMs.
Table 6-1 Frame Buffer Configurations
Number of Video Memory Modules
Supported Resolutions
1
1980 x 1280 or lower
2
2048 x 2048 or lower
6.3.6.3 Eight-Bit Overlay Planes
Eight-bit double buffered overlay planes are a standard feature of the PowerStorm 1000
graphics subsystem.