Cavium FastLinQ 45000 Series, User Manual

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1–Product Overview
Features
2 BC0154501-00 P
 Data center bridging eXchange protocol (DCBX; CEE version 1.01,
IEEE)
 Single-chip solution:
 25/40/100Gb MAC
 SerDes interface for direct attach copper (DAC) transceiver connection
 PCI Express ® (PCIe ® ) 3.0 x8
 Zero copy capable hardware
 Performance features:
 TCP, IP, UDP checksum offloads
 TCP segmentation offload (TSO)
 Large segment offload (LSO)
 Generic segment offload (GSO)
 HW based Generic Receive Offload (HW-GRO)
 Large receive offload (LRO)
 Receive segment coalescing (RSC)
 Microsoft
®
dynamic virtual machine queue (VMQ), and Linux
Multiqueue
 Adaptive interrupts:
 Transmit/receive side scaling (TSS/RSS)
 Accelerated Receive Flow Steering (ARFS)
 Stateless offloads for Network Virtualization using Generic Routing
Encapsulation (NVGRE), Generic Network Virtualization
Encapsulation (GENEVE), and virtual LAN (VXLAN) L2/L3 GRE
tunneled traffic
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 Manageability:
 System management bus (SMB) controller
 Advanced Configuration and Power Interface (ACPI) 1.1a compliant
(multiple power modes)
 Network controller-sideband interface (NC-SI) support
 The management applications listed in Adapter Management
1
This feature requires OS or Hypervisor support to use the offloads.