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User's Manual (MUT)
Mod. V1724 8 Channel 14bit - 100MS/s Digitizer
06/11/2007
7
NPO:
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00103/05:V1724x.MUTx/07 V1724_REV7.DOC
63
38
3.11.
Data transfer capabilities
The board supports D32 single data readout, Block Transfer BLT32 and MBLT64,
2eVME and 2eSST cycles. Sustained readout rate is up to 60 MB/s with MBLT64, up to
100 MB/s with 2eVME and up to 160 MB/s with 2eSST.
3.12. Events
readout
3.12.1. Sequential
readout
The events, once written in the SRAMs (Memory Event Buffers), become available for
readout via VME. During the memory readout, the board can continue to store more
events (independently from the readout) on the free buffers. The acquisition process is
therefore “deadtimeless”, until the memory becomes full.
Although the memories are SRAMs, VMEBus does not handle directly the addresses, but
takes them from a FIFO. Therefore, data are read from the memories sequentially,
according to the selected Readout Logic, from a memory space mapped on 4Kbytes
(0x0000÷0x0FFC).
The events are readout sequentially and completely, starting from the Header of the first
available event, followed by the Trigger Time Tag, the Event Counter and all the samples
of the channels (from 0 to 7). Once an event is completed, the relevant memory buffer
becomes free and ready to be written again (old data are lost). After the last word in an
event, the first word (Header) of the subsequent event is readout. It is not possible to
readout an event partially (see also § 3.3.5).
3.12.1.1. SINGLE
D32
This mode allows to readout a word per time, from the header (actually 4 words) of the
first available event, followed by all the words until the end of the event, then the second
event is transferred. The exact sequence of the transferred words is shown in § 3.3.5.
We suggest, after the 1
st
word is transferred, to check the Event Size information and
then do as many D32 cycles as necessary (actually Event Size -1) in order to read
completely the event.
3.12.1.2.
BLOCK TRANSFER D32/D64, 2eVME
BLT32 allows, via a single channel access, to read N events in sequence, N is set via the
BLT Event Number register (see § 4.42).
The event size depends on the Buffer Size Register setting (§ 4.15); namely:
[Event Size] = [8*(Block Size)] + [16 bytes]
Smaller event size can be achieved via Custom Size setting (see § 3.3.4.1 and § 4.17).
Then it is necessary to perform as many cycles as required in order to readout the
programmed number of events.
We suggest to enable BERR signal during BLT32 cycles, in order to end the cycle
avoiding filler readout. The last BLT32 cycle will not be completed, it will be ended by
BERR after the #N event in memory is transferred (see example in the figure below).