AT90S/LS4434 and AT90S/LS8535
41
Timer/Counter2 Control Register – TCCR2
•
Bit 7 – Res: Reserved Bit
This bit is a reserved bit in the AT90S4434/8535 and always reads as zero.
•
Bit 6 – PWM2: Pulse Width Modulator Enable
When set (one), this bit enables PWM mode for Timer/Counter2. This mode is described on page 42.
•
Bits 5, 4 – COM21, COM20: Compare Output Mode, Bits 1 and 0
The COM21 and COM20 control bits determine any output pin action following a compare match in Timer/Counter2. Output
pin actions affect pin PD7(OC2). This is an alternative function to an I/O port and the corresponding direction control bit
must be set (one) to control an output pin. The control configuration is shown in Table 18.
Note:
In PWM mode, these bits have a different function. Refer to Table 20 for a detailed description.
•
Bit 3 – CTC2: Clear Timer/Counter on Compare Match
When the CTC2 control bit is set (one), Timer/Counter2 is reset to $00 in the CPU clock cycle after a compare match. If the
control bit is cleared, Timer/Counter2 continues counting and is unaffected by a compare match. Since the compare match
is detected in the CPU clock cycle following the match, this function will behave differently when a prescaling higher than 1
is used for the timer. When a prescaling of 1 is used and the compareA register is set to C, the timer will count as follows if
CTC2 is set:
... | C-2 | C-1 | C | 0 | 1 |...
When the prescaler is set to divide by 8, the timer will count like this:
... | C-2, C-2, C-2, C-2, C-2, C-2, C-2, C-2 | C-1, C-1, C-1, C-1, C-1, C-1, C-1, C-1 | C, 0, 0, 0, 0, 0, 0, 0, 0 | 1, 1, 1,...
In PWM mode, this bit has no effect.
•
Bits 2, 1, 0 – CS22, CS21, CS20: Clock Select Bits 2, 1 and 0
The Clock Select bits 2,1 and 0 define the prescaling source of Timer/Counter2.
Bit
7
6
5
4
3
2
1
0
$25 ($45)
–
PWM2
COM21
COM20
CTC2
CS22
CS21
CS20
TCCR2
Read/Write
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Table 18.
Compare Mode Select
COM21
COM20
Description
0
0
Timer/Counter disconnected from output pin OC2
0
1
Toggle the OC2 output line.
1
0
Clear the OC2 output line (to zero).
1
1
Set the OC2 output line (to one).
