Atmel AT91CAP9, User Manual

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7-14 AT91CAP9A-DK Development Kit User Guide
6321B–CAP–02-Jul-07
B24 SM_D29 PISMO_SM77 E3 DIFFIO_RX70p 5
B25 SM_D28 PISMO_SM76 E4 DIFFIO_RX70n 5
B26 SM_D27 PISMO_SM75 K8 DIFFIO_TX70p 5
B27 SM_D26 PISMO_SM73 E1 DIFFIO_RX71p 5
B28 SM_D25 PISMO_SM72 E2 DIFFIO_RX71n 5
B29 SM_D24 PISMO_SM71 L7 DIFFIO_TX71p 5
B30 VSS12 GND
B31 VSS9 GND
B32 SM_D15 PISMO_SM62 M9 DIFFIO_TX73n 5
B33 SM_D14 PISMO_SM61 G3 DIFFIO_RX74p 5
B34 SM_D13 PISMO_SM60 G4 DIFFIO_RX74n 5
B35 SM_D12 PISMO_SM59 L5 DIFFIO_TX74p 5
B36 SM_D11 PISMO_SM58 L6 DIFFIO_TX74n 5
B37 SM_D10 PISMO_SM57 G1 DIFFIO_RX75p 5
B38 SM_D09 PISMO_SM56 G2 DIFFIO_RX75n 5
B39 SM_D08 PISMO_SM55 M10 DIFFIO_TX75p 5
B40 DNU15 n.c.
C01 DNU11 n.c.
C02 DM_BA2 PISMO_DM18 L16 4
C03 DM_RESET# PISMO_DM35 C13 DQS9T 4
C04 DM_ODT1 PISMO_DM33 H14 4
C05 DM_ODT0 PISMO_DM32 F15 DQ8T 4
C06 DM_VREF (see schematics,
Section 16
)
C07 DM_VIO_9 VCCIO_4
C08 DM_VIO_3 VCCIO_4
C09 DM_VIO_6 VCCIO_4
C10 DM_VIO_5 VCCIO_4
C11 DM_VIO_8 VCCIO_4
C12 DM_VIO_4 VCCIO_4
C13 DM_VCC_3 (see schematics,
Section 16
)
C14 DM_VIO_2 VCCIO_4
C15 DM_VIO_7 VCCIO_4
C16 DM_VCC_2 (see schematics,
Section 16
)
C17 DM_VCC_1 (see schematics,
Section 16
)
C18 DM_VIO_1 VCCIO_4
C19 DM_VIO_0 VCCIO_4
Table 7-3. PISMO-FPGA Signal Assignment (Continued)
PISMO
Pin Standard PISMO
Name
Board Signal Name FPGA Pin
Alternate FPGA
Pin Function
FPGA Bank