AT91CAP9A-DK Development Kit User Guide
16-1
6321B–CAP–02-Jul-07
Section 16
16.1
Schematics
This section contains the following appended schematics:
AT91CAP9A-DKZ Mezzanine Board (Top Level)
FPGA User I/O Through-hole Grid
Motherboard Connectors
FPGA PISMO Connectors
CAP Power Supply
CAP Busses
CAP
– USB
– PLL
– ICE
CAP SODIMM EBI
FPGA Power 1/2
FPGA Power 2/2
FPGA I/Os
FPGA I/Os Configuration
– Banks 1 - 6
FPGA I/Os Configuration
– Banks 7 - 8
FPGA I/Os Configuration
– JTAG
– AS Mode
FPGA SODIMM EBI
Summary of Contents for AT91CAP9
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