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MITX-CORE-820 Installation and Use (6806800M10H

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104

registers which selects the register within the bank. Accessing the data register while the index 
register holds a value of 30h or higher actually accesses the logical device configuration 
registers. These are currently pointed to by the index register within the logical device 
currently selected by the LDN register

Figure 6-2

Structure of Standard Configuration Register

Summary of Contents for MITX-CORE-820

Page 1: ...the information therein All referenced brands product names service names and trademarks are the property of their respective owners 00000005981LF 000 EOS Power Buy Now We have 45 000 LP502030 PCM NTC LD A02554 EEMB Lithium Battery Rectangular 3 7V 250mAh Rechargeable in stock now Starting at 0 034 This EEMB part is fully warrantied and traceable 1 855 837 4225 Give us a call International 1 555 5...

Page 2: ...MITX CORE 820 Installation and Use P N 6806800M10H July 2014 ...

Page 3: ...hanges from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to an Artesyn website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without ...

Page 4: ...ion and Installation 39 2 1 Environmental and Power Requirements 39 2 1 1 Environmental Requirements 39 2 1 2 Power Requirements 40 2 1 3 Power Dissipation 40 2 2 Unpacking and Inspecting the Board 41 2 3 Preparing the Installation Environment 42 2 4 Memory Module Installation 44 2 5 Processor Cooler Installation 45 3 Controls LEDs and Connectors 47 3 1 Board Layout 47 3 2 Connector Definitions 49...

Page 5: ...62 4 12 Power Supplies 63 4 12 1 Power Consumption 64 4 12 2 Power Sequencing Requirements 64 4 12 3 Power Management 64 4 12 4 Power Measurement 65 4 13 Embedded Controller 65 4 13 1 Voltage Monitor 65 4 13 2 Serial Port 65 4 13 3 Fan Header 66 4 13 4 PS 2 66 4 13 5 Debug Header 67 4 13 6 Charge Board Interface 67 4 14 SMBUS Architecture 68 4 15 Audio 69 4 16 Watchdog Timer 71 4 17 RTC Circuit 71...

Page 6: ...tion 83 5 4 2 2 Processor Configuration 84 5 4 2 3 Processor Power Management 84 5 4 2 4 Peripheral Configuration 85 5 4 2 5 HDD Configuration 85 5 4 2 6 Memory Configuration 86 5 4 2 7 System Agent SA Configuration 86 5 4 2 8 South Bridge Configuration 88 5 4 2 9 Network Configuration 90 5 4 2 10 AMT Configuration 90 5 4 2 11 ME Configuration 91 5 4 3 Security Menu 92 5 4 3 1 Trusted Platform Mod...

Page 7: ...KBC Address to Host Processor 106 6 2 6 EC I O Port 106 6 2 6 1 EC Status Register 106 6 2 7 EC Command Register 107 6 2 8 EC Command Program Sequence 108 6 2 9 EC Space Definition 108 6 2 10 Event List 112 6 2 11 OS Driver Support 113 6 3 EC Firmware Porting 113 6 3 1 Power Sequence Control 113 6 3 2 PECI 116 6 3 3 Thermal Fan Speed Control 118 6 3 3 1 Thermal Trip 118 6 3 3 2 Thermal Throttling ...

Page 8: ...ash with Utility 122 6 4 4 Crisis Recovery 122 6 5 EC Debug Interface 122 6 5 1 Serial Port 122 6 5 2 JTAG Interface 123 A Replacing the Battery 125 A 1 Overview 125 A 2 Procedure Description 126 B Related Documentation 129 B 1 Artesyn Embedded Technologies Embedded Computing Documentation 129 ...

Page 9: ...MITX CORE 820 Installation and Use 6806800M10H Contents 8 Contents Contents ...

Page 10: ...ut 62 Table 4 10 DC IN Jack Pin Definitions 63 Table 4 11 ATX Power Supply Connector J12 63 Table 4 12 Board MAX Power Consumption Estimation 64 Table 4 13 Serial Port Connectors J5 65 Table 4 14 CPU and System Fan Headers P2 and P23 Description 66 Table 4 15 PS 2 Header P5 Description 66 Table 4 16 EC Debug Header P14 Description 67 Table 4 17 Charge Board Interface P22 67 Table 4 18 Audio Jack B...

Page 11: ...d Description 87 Table 5 16 Graphics Configuration 87 Table 5 17 IGD Configuration 88 Table 5 18 South Bridge Configuration Field Description 88 Table 5 19 SB PCI Express Configuration Field Description 89 Table 5 20 PCI Express Port 3 7 8 Configuration Field Description 89 Table 5 21 SB USB Configuration Field Description 89 Table 5 22 SB Azalia Configuration Field Description 90 Table 5 23 Netwo...

Page 12: ... Register 106 Table 6 5 EC Command Register 107 Table 6 6 EC Command Program Sequence 108 Table 6 7 EC Space Definition 108 Table 6 8 Q Event List 112 Table 6 9 Thermal Trip Levels 118 Table 6 10 LED Control Status 120 Table B 1 Artesyn Embedded Technologies Embedded Computing Publications 129 ...

Page 13: ...MITX CORE 820 Installation and Use 6806800M10H 12 List of Tables ...

Page 14: ...57 Figure 4 4 SATA HDD Power Connector P17 61 Figure 4 5 USB Internal Header P24 P25 P26 62 Figure 4 6 DC IN Jack Front View 63 Figure 4 7 ATX Power Supply Connector Top View 64 Figure 4 8 CPU and System Fan Headers P2 and P23 66 Figure 4 9 PS 2 Header P5 67 Figure 4 10 SMBUS Architecture 68 Figure 4 11 Rear Panel Audio Jack 70 Figure 4 12 Front Panel Audio Header P9 70 Figure 4 13 Front Panel Hea...

Page 15: ...MITX CORE 820 Installation and Use 6806800M10H 14 List of Figures ...

Page 16: ...s and connectors used on the motherboard Functional Description describes the functionalities provided on the motherboard Firmware describes the motherboard s firmware BIOS describes the motherboard s firmware Replacing the Battery contains the procedures for replacing the battery Related Documentation provides a listing of related product documentation manufacturer s documents and industry standa...

Page 17: ...mmable Read Only Memory FCC Federal Communications Commission F W Firmware FPBGA Flip Chip Plastic Ball Grid Array GB GigaBytes GbE Gigabit Ethernet Gbit Gigabit Gbps Gigabits Per Second GLCI Gigabit LAN Connect Interface H W Hardware I O Input Output IEEE Institute of Electrical and Electronics Engineers I2C Inter IC JTAG Joint Test Access Group KB Kilo Bytes KBAUD Kilo Baud LCD Liquid Crystal Di...

Page 18: ... On Reset PRD Product Requirements Document RAM Random Access Memory Rcv Receive ROM Read Only Memory RTC Real Time Clock SATA Serial AT Attachment SDRAM Synchronous Dynamic Random Access Memory SMT Surface Mount Technology SODIMM Small Outline Dual In line Memory Module SPD Serial Presence Detect SRAM Static Random Access Memory S W Software USB Universal Serial Bus V Volts VIO Input Output Volta...

Page 19: ...oron screenoutputandcoderelatedelements or commands in body text Courier Bold Used to characterize user input and to separate it from system output Reference Used for references and for table and figure descriptions File Exit Notation for selecting a submenu text Notation for variables and keys text Notation for software buttons to click on the screen and parameter description Repeated item for ex...

Page 20: ...rdous situation which if not avoided could result in death or serious injury Indicates a hazardous situation which if not avoided may result in minor or moderate injury Indicates a property damage message No danger encountered Pay attention to important information Notation Description ...

Page 21: ...te 6806800M10G February 2012 Updated Supported OS List on page 95 Added Accessing the MEBX Setup Menu on page 99 and BIOS Update on page 99 6806800M10F November 2011 Added BIOS Updated Figure MITX CORE 820 Module Components on page 47 and Figure MITX CORE 820 Module Components Continued on page 48 Editorial edits changes in information updates 6806800M10E September 2011 Updated Figure MITX CORE 82...

Page 22: ...ed Figure MITX CORE 820 Module Components on page 47 UpdatedTable DC INJackPinDefinitions on page 63 Updated Table ATX Power Supply Connector J12 on page 63 Updated Table Board MAX Power Consumption Estimation on page 64 6806800M10C July 2011 Updated Figure MITX CORE 820 Module Components on page 47 Added information on the board CPU specs 6806800M10B May 2011 Changed marketing name to MITX CORE 8...

Page 23: ...MITX CORE 820 Installation and Use 6806800M10H About this Manual 22 About this Manual ...

Page 24: ...s or on aircraft Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering areauthorizedtoinstall removeormaintaintheproduct Theinformationgiveninthismanual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel Keep away from live circuits inside the equipment Operating personnel must not remove equipmen...

Page 25: ...ystem may damage connector pins If the module hangs during insertion pull it out and insert it again Damage of the Product and Additional Devices and Modules Incorrect installation or removal of additional devices or modules damages the product or the additional devices or modules Before installing or removing additional devices or modules read the respective documentation and use appropriate tool...

Page 26: ...product outside the specified environmental limits Make sure the product is completely dry and there is no moisture on any surface before applying power Expansion and FRU Replacement Product Damage Bent pins or loose components can cause damage to the product the backplane or other system components Carefully inspect the product and the backplane for both pin and component integrity before install...

Page 27: ... since other battery types may be specified for other environments or may have a shorter lifetime Only use the same type of lithium battery as is already installed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder Do not use a screw driver to remove the battery from its holder Environment Environmental Damage Improperly disposing of use...

Page 28: ...on Artesyn Das Produkt erfüllt die für die Industrie geforderten Sicherheitsvorschriften und darf ausschließlich für Anwendungen in der Telekommunikationsindustrie im Zusammenhang mit Industriesteuerungen und in der Entwicklung verwendet werden Es darf nicht in sicherheitskritischen Anwendungen lebenserhaltenden Geräten oder in Flugzeugen verwendet werden Einbau Wartung und Betrieb dürfen nur von ...

Page 29: ...das Modul während der Installation verkantet ziehen Sie es wieder heraus und führen Sie sie erneut ein Beschädigung des Produktes und der Zusatzmodule Fehlerhafter Ein oder Ausbau von Zusatzmodulen führt zu Beschädigung des Produktes oder der Zusatzmodule Lesen Sie deshalb vor dem Ein oder Ausbau von Zusatzmodulen die Dokumentation und benutzen Sie angemessenes Werkzeug Betrieb Beschädigung des Sy...

Page 30: ...rodukte kann zu Kurzschlüssen führen Betreiben Sie die Produkte nur innerhalb der angegebenen Grenzwerte für die relative Luftfeuchtigkeit und Temperatur und stellen Sie vor dem Einschalten des Stroms sicher dass sich auf den Produkten kein Kondensat befindet Erweiterung und FRU Austausch Beschädigung des Produktes Verbogene Stecker oder lose Teile können das Produkt die Backplane oder andere Syst...

Page 31: ...r bei Auslieferung des Produktes installiert war kann Datenverlust die Folge sein da die neu installierte Batterie für andere Umgebungsbedingungen oder eine andere Lebenszeit ausgelegt sein könnte Verwenden Sie daher den gleichen Batterietyp der bei Auslieferung des Produktes installiert war Beschädigung des PCBs und der Batteriehalterung Wenn Sie die Batterie mit einem Schraubendreher ausbauen kö...

Page 32: ... embedded processor Chipset Intel 6 Series PCH Memory Feature Supports up to 16GB dual channel non ECC unbuffered DDR3 SO DIMM Up to 1600 MT s Embedded Controller Nuvoton NPCE791C Audio Audio on board ALC888S VC Rear Panel 5 audio jacks 1 SPDIF output Front Panel 2 re tasking audio jacks 2nd SPDIF output header optional LAN Intel WG82579LM Intel WG82574L USB High speed Enhanced Host Controller int...

Page 33: ... one full card or one half card one half card or one half card one DMC card supported eUSB Standard eUSB header on board Graphics Internal graphics CRT Dual Mode display port embedded DP single dual channel 24 bit 18bit LVDS DMC External graphics PEG 16X supports Gen 2 Smart Charger Battery Interface 7 pin header interface for Smart Charger Battery Battery must have enough power capacity Output vo...

Page 34: ...0 Serial ATA II extensions to SATA1 0 revision1 0 Serial ATA 6G specification VESA Specification SMBIOS 2 3 ACPI Wake up event Power Button S0 S3 S4 S5 Deep Sx KB S0 S3 Mouse S0 S3 PME S0 S3 S4 S5 Deep Sx USB S0 S3 RTC S0 S3 S4 S5 Wake on LAN support DMI support Table 1 1 MITX CORE 820 Features Summary continued Function Features Table 1 2 Board Standard Compliances Standard Description IEC 60950 ...

Page 35: ...ts and methods of measurements of radio disturbance characteristics of Information Technology Equipment AS NZS CISPR 22 Class B Australia New Zealand Limits and methods of measurement of radio disturbance characteristics of Information Technology Equipment VCCI Class B Japan Voluntary Control Council for Interference by Information Technology Equipment Table 1 2 Board Standard Compliances Standard...

Page 36: ...t the following product in accordance with the requirements of 2004 108 EC 2006 95 EC 2011 65 EU and their amending directives Product Mini ITX motherboard 2nd Gen No CPU No Memory Model Name Number MITX CORE 820 has been designed and manufactured to the following specifications EN55022 2006 A1 2007 Class B EN55024 1998 A1 2001 A2 2003 IEC 60950 1 2nd Edition A1 2009 2011 65 EU RoHS Directive As m...

Page 37: ...Introduction MITX CORE 820 Installation and Use 6806800M10H 36 1 4 Mechanical Specifications Figure 1 2 MITX CORE 820 Mechanical Data Top View ...

Page 38: ... Installation and Use 6806800M10H 37 1 5 Board Identification This section shows the serial number and its location on the board Figure 1 3 MITX CORE 820 Mechanical Data Side View Figure 1 4 MITX CORE 820 Serial Number Location ...

Page 39: ...through Artesyn These iclude the CPU or processor cooler heat sink and SODIMM DDR3 MEM To order the processor please contact Intel customer support for ordering information Contact your MEM supplier for ordering details Table 1 3 Ordering Information Ordering Number Description MITX CORE 820 MITX CORE 820 Mini ITX Motherboard MCASE 820 MCASE 820 Mini ITX Motherboard with chassis MITX CORE HTSNK MI...

Page 40: ...d the motherboard and not to the component temperature Product Damage High humidity and condensation on surfaces cause short circuits Do not operate the product outside the specified environmental limits Make sure the product is completely dry and there is no moisture on any surface before applying power Overheating and Damage of the Product Operating the product without forced air cooling can lea...

Page 41: ...ripherals on theboards are running at full loading The power supply used for MITX CORE 820 should have margin to meet the power consumption in different circumstance When the back panel IO power connector is used to power the board the 4 pin 12V ATX power connector can also be used as an output DC source but assuming this wouldn t affect the power of the board 2 1 3 Power Dissipation The following...

Page 42: ...bles Two SATA data cables Driver CD I O Shield SODIMM 5W Two SODIMMs Tc 85 WG82574L 0 473W Tc 109 WG82579LM 0 659W Tc 106 Table 2 2 Power Dissipation of Critical Components Part TDP W Operation Limit C Damage of Circuits Electrostatic discharge and incorrect installation and removal of the product can damage circuits or shorten its life Before touching the product make sure that you are working in...

Page 43: ...ponents away from heat generating devices such as radiator Ensure that your sleeves are tightened or rolled up above the elbow For safety purposes it is not recommended to wear jewelry watch glasses with metal frame or clothes with metal buttons Do not exert too much force or insert or remove the components forcibly Avoid damage to the components or plug ins Confirm the feasibility of the of opera...

Page 44: ...ion and replacement procedures of the component as well as to master the skills required by the operation Check the environment Make sure that the power supply temperature and humidity meet the operating requirements for the board and its components For details refer to the respective system documentation Prepare the parts and the tools Prepare the components to be installed or replaced When you h...

Page 45: ... SO DIMM is to be installed on the antistatic desktop 3 Take the SO DIMM out of the antistatic package holding it by the edges 4 Line up the notch located on the row of the metal pins at the bottom of the module with the key in the SO DIMM slot on the motherboard 5 Insert the SO DIMM in a slantwise position or at a 45 angle to slide the module into place 6 Press the module down against the motherb...

Page 46: ...g off the protective film to reveal the glue layer 4 Align the backplate to the motherboard The screw holes on backplate should fit exactly over the holes on the motherboard Make sure the glue layer of the backplate does not touch any other part of the motherboard 5 Place the cooler on the backplate and secure it with the provided screws 6 Plug the fan header into the fan connector on the motherbo...

Page 47: ... 820 Installation and Use 6806800M10H 46 Removing the Processor Cooler 1 Wear the ESD preventive wrist strap 2 Disconnect the fan header from the fan connector on the motherboard 3 Loosen the screws to remove the processor cooler from the backplate ...

Page 48: ... 820 Installation and Use 6806800M10H 47 Controls LEDs and Connectors 3 1 Board Layout The module components of the MITX CORE 820 are shown in detail in Figure 3 1and Figure 3 2 Figure 3 1 MITX CORE 820 Module Components ...

Page 49: ...Controls LEDs and Connectors MITX CORE 820 Installation and Use 6806800M10H 48 Figure 3 2 MITX CORE 820 Module Components Continued ...

Page 50: ...rt80 Header See TPM Port 80 Interface on page 73 P24 USB Internal Header See USB 2 0 on page 62 P25 USB eUSB Header See USB 2 0 on page 62 P26 USB Header See USB 2 0 on page 62 P14 EC Debug Header See Debug Header on page 67 P17 SATA HDD Power Header See Storage on page 61 P5 PS 2 Header See PS 2 on page 66 P2 System Fan Header See Fan Header on page 66 P18 Wake UP Header See Wake Events on page 7...

Page 51: ... one green LED and one red LED to indicate the charging and discharging status Only a charging board is needed for battery management as the LED is fully controlled by the EC P23 CPU Fan Header See Fan Header on page 66 J15 eDP Connector See Embedded Display Port eDP on page 58 J11 Audio Jack See Audio on page 69 J13 DC IN Jack See Power Supplies on page 63 J12 ATX Power Supply Connector See Power...

Page 52: ...Controls LEDs and Connectors MITX CORE 820 Installation and Use 6806800M10H 51 3 4 Rear I O Connectors Figure 3 3 Rear I O Connectors ...

Page 53: ...Controls LEDs and Connectors MITX CORE 820 Installation and Use 6806800M10H 52 ...

Page 54: ...ram This engineering specification defines a standard Mini ITX motherboard The board supports a single DC Jack or ATX 4 pin power input and smart battery power input The board communicates with a charger board with the smart battery input through a header on the motherboard Figure 4 1 Block Diagram ...

Page 55: ...andy Bridge Mobile rPGA 988B embedded processor The board also provides the option to support one 35 W 2 core Core i5 Celeron Intel Sandy Bridge Mobile PGA Embedded processor 4 3 Motherboard Clock Diagram The MITX CORE 820 implements full integrated clocking mode as the only platform clock solution Figure 4 2 Platform Clocks Distribution ...

Page 56: ...Table 4 1 PCH SKUs Feature Set SKU Name QM67 UM67 HM67 HM65 QS67 PCI Express 2 0 Ports 8 8 8 8 8 PCI Interface No No No No No USB 2 0 Ports 14 14 14 125 14 Total number of SATA Ports SATA Ports 6 Gb s 3 Gb s and 1 5 Gb s SATA Ports 3 Gb s and 1 5 Gb s only 6 24 4 6 24 4 6 24 4 6 24 4 6 24 4 HDMI DVI VGA SDVO Display Port eDP LVDS Yes Yes Yes Yes Yes Integrated Graphics Support with PAVP 2 0 Yes Ye...

Page 57: ... same time 4 6 1 LVDS The MITX CORE 820 supports dual channel LVDS on pipe A of the Integrated Graphics Controller The Intel 6 Series chipset supports up to 24 bit color per pixel so the design can support both 18 bit and 24 bit LCD panels utilizing different cables Table 4 2 LVDS Connector P6 Pin Signal Pin Signal 1 LVDSA_DATA0 2 LVDSB_DATA0 3 LVDSA_DATA0 4 LVDSB_DATA0 7 LVDSA_DATA1 8 LVDSB_DATA1...

Page 58: ...wer supply for LVDS monitor 3 3 V is the default while 5 V or 12 V are other options 12 V and 5 V can be used to power the inverter with 12 V as default 4 6 2 VGA The design implements a VGA connector on the board edge Table 4 3 LVDS Panel VDD Selector P29 Jumper setting Jumper P29 Configuration P29 2 4 3 3 V Default P29 3 4 12 V P29 6 4 5 V Table 4 4 LVDS Inverter Connector P8 Pin Signal 1 V12S 2...

Page 59: ...ce which can connect to a Flat Panel Display FPD with 30 pin 40 pin eDP connector for LED backlight with LED Driver on PCB for the Embedded Display Port Spec v1 1 The interface can support 1 2 or 4 lanes eDP with up to 2 7 Gb s per lane Table 4 5 eDP Connector J15 Pin Signal Name Pin Signal Name 1 VDD_LVDS 21 DP_TXN0 2 VDD_LVDS 22 DP_TXP0 3 VDD_LVDS 23 GND 4 VDD_LVDS 24 EMB_AUXP 5 VDD_LVDS 25 EMB_...

Page 60: ...oard The MITX CORE 820 provides two GbE ports One port uses the Intel 6 Series PCH integrated MAC and the Intel WG82579LM GbE PHY The Intel WG82579LM is connected to PCH through the 1x PCI Express The other Gbe port uses Intel WG82574L controller MITX CORE 820 only The design provides two RJ 45 connectors supporting 10 100 1000 Base T LAN is powered by suspend well to support AMT and wake on LAN w...

Page 61: ... 1 LAN1_MDI0P 2 LAN1_MDI0N 3 LAN1_MDI1P 4 LAN1_MDI1N 5 VCT_LAN_C 6 VCT_LAN_C 7 LAN1_MDI2P 8 LAN1_MDI2N 9 LAN1_MDI3P 10 LAN1_MDI3N L1 LAN1_LED_LNK _ACT 12 LAN1_LED_LNK _ACT_R L3 LAN1_LED_1000 14 LAN1_LED_100 Table 4 7 LAN2 Connector Pin Signal Pin Signal 1 LAN2_MDI0P 2 LAN2_MDI0N 3 LAN2_MDI1P 4 LAN2_MDI1N 5 VCC1V8_LAN_C 6 VCC1V8_LAN_C 7 LAN2_MDI2P 8 LAN2_MDI2N 9 LAN2_MDI3P 10 LAN2_MDI3N L1 LAN2_LED...

Page 62: ... wireless devices The MITX CORE 820 supports PCI Express USB and SMbus to all PCI Express full mini card half mini card and display mini card sites The MITX CORE 820 supports one display port to the display mini card site 4 10 Storage The MITX CORE 820 supports two SATA 3G and two SATA 6G ports with standard vertical data connectors The SATA power connector provides sufficient 3 3V 5V 12V power to...

Page 63: ...out The P25 of the 10 pin headers provides mechanical support for retention standoff to support Intel Z U130 Value Solid State Drive standard profile All USB ports including the powered USB supports low speed full speed and high speed using the USB 2 0 Enhanced Host Controller Interface EHCI Figure 4 5 shows the pinout of the connector Table 4 9 USB Internal Header P24 P25 P26 Pinout Pin Signal Pi...

Page 64: ...region or from a 4 pin 12 V ATX power connector When a charger board is used the power can be supplied using a 4 pin 12 V ATX power connector from the adapter or battery connected to charger board Table 4 10 DC IN Jack Pin Definitions Pin Signal Pin Signal 1 GND 2 VDC_IN 3 GND 4 VDC_IN Figure 4 6 DC IN Jack Front View Table 4 11 ATX Power Supply Connector J12 Pin Signal Pin Signal 1 GND 2 GND 3 VD...

Page 65: ...CORE 820 design is ACPI 4 0a compliant System power states S0 Power on S3 Suspend to RAM S4 Suspend to Disk and S5 Soft Off is supported Deep Sleep Sx is also supported after the option in BIOS setup is enabled The board provides FET s to power off appropriate power planes Figure 4 7 ATX Power Supply Connector Top View Table 4 12 Board MAX Power Consumption Estimation State Power Consumption Confi...

Page 66: ...e following sections list the functionality of the embedded controller or EC 4 13 1 Voltage Monitor The MITX CORE 820 design implements voltage monitoring capability on V3A V5A and V1 5S rails The ADC of EC can be used as voltage monitor 4 13 2 Serial Port EC implements one RS 232 compatible serial port on the rear IO It has RXD TXD RTS CTS and RI signals on the port Table 4 13 Serial Port Connect...

Page 67: ...t 4 13 4 PS 2 The MITX CORE 820 design implements two PS 2 ports for keyboard and mouse The ports may be implemented as vertical headers on the motherboard planar if there is no space in the backpanel I O region One PS 2 header can support two PS 2 ports for keyboard and mouse Table 4 15 and Figure 4 9 shows the pinout for PS 2 Table 4 14 CPU and System Fan Headers P2 and P23 Description Pin Signa...

Page 68: ...ating with the Smart Charger and the Smart Battery respectively EC also accepts ACAV AC_Present and monitors charge discharge current information from the charge board Figure 4 9 PS 2 Header P5 Table 4 16 EC Debug Header P14 Description Pin Signal Pin Signal 1 EC_TCK 2 EC_TDO 3 EC_TMS 4 GND 5 EC_TDI 6 EC_RDY Table 4 17 Charge Board Interface P22 Pin Signal Pin Signal 1 SMB_BS_DATA 2 SMB_BATT_DATA ...

Page 69: ...Functional Description MITX CORE 820 Installation and Use 6806800M10H 68 4 14 SMBUS Architecture Figure 4 10 SMBUS Architecture ...

Page 70: ...ar Speakers Middle Sub Speaker S PDIF and Stereo Side Speakers Internal Audio Header Mic In Stereo Headphone Out S PDIF Table 4 18 Audio Jack Board Side Pin Definitions J11 Pin Signal Pin Signal Pin Signal Pin Signal Pin Signal 1 AGND 2 MIC1_L 3 MIC1_JD 4 AGND 5 MIC1_R 22 LOUT_L 23 LOUT_JD 24 AGND 25 LOUT_R 32 LIN_L 33 LIN_JD 34 AGND 35 LIN_R 41 AGND 42 CEN_CN 43 CEN_JD 44 AGND 45 LFE_CN 52 SURR_L...

Page 71: ...e 6806800M10H 70 Figure 4 11 Rear Panel Audio Jack Table 4 19 Front Panel Audio Header P9 Description Pin Signal Pin Signal 1 MIC2_L 2 GND 3 MIC2_R 4 FP_AUDIO_PSNT 5 LOUT2_R 6 MIC2_JD 7 GND 8 KEY 9 LOUT2_L 10 LOUT2_JD Figure 4 12 Front Panel Audio Header P9 ...

Page 72: ... WDT is disabled before entering S3 state and re enabled upon exiting S3 4 17 RTC Circuit There is an on board battery holder for a BR2032 or an equivalent battery This battery holder allows for quick and easy replacement of a 3 V button cell lithium battery which provides back up power to the on board RTC 4 17 1 Boot Block The SPI flash supports the boot block section which contains the code to b...

Page 73: ...AN image MAC address and the manageability engine AMT firmware The SPI flash devices can be socketed during debugging SPI flash provides an alternative to the firmware hub for system BIOS 4 19 Front Panel Header There is a standard front panel header on the board Table 4 22 Front Panel Header P1 Definition Pin Signal Pin Signal 1 SATA_LED _R 2 POWER_LED _R 3 SATA_LED 4 POWER_LED 5 GND 6 EXT_PWRBTN...

Page 74: ...e bottom of the PCI Express 16x card is over the standard specifications it may have a mechanical conflict with the TPM module which is plugged on to the TPM header This is not a defect on the motherboard Table 4 23 TPM Port80 Header P3 Definition Pin Signal Pin Signal 1 CLK_PCI_TPM 2 GND 3 LPC_FRAME 4 KEY 5 TPM_RST_N 6 V5S 7 LPC_AD3 8 LPC_AD2 9 V3 3S 10 LPC_AD1 11 LPC_AD0 12 GND 13 SMB_CLK_S 14 S...

Page 75: ...he power LED and SATA HDD activity The power LED is driven by the embedded controller There are two other LED headers to show charge status indication One is used to indicate charging and one is used to indicate insufficient battery 4 22 Case Open Header Case open header is reserved for customized application Table 4 24 Charge LED 1 P31 Pin Signal 1 V3 3A_KBC 2 C_PWM Table 4 25 Charge LED 2 P34 Pi...

Page 76: ...port the following ports for debug Extended Debug Port XDP tool for processor run control and debug Port 80 display for BIOS POST codes Table 4 27 Internal Graphics Disable Header P33 Jumper setting Jumper P33 Configuration P33 1 2 NC DEFAULT P33 2 3 I GRAPHICS DISABLE Table 4 28 User GPIO Header P28 Pin Signal Pin Signal 1 PCA9557_GPO0 2 PCA9557_GPI0 3 PCA9557_GPO1 4 PCA9557_GPI1 5 PCA9557_GPO2 6...

Page 77: ... and provides support for M0 M1 and M offmanageabilitystates Italsosupportsserial over console IDEredirect remotepowerup shutdown and reset The Gala MITX CORE 820 reads and receives alerts for voltage monitor fan tachometer CPU temperature and ambient temperature The AMT firmware used is written to expect the existence of an embedded ACPI controller that is typically found in Interl mobile referen...

Page 78: ...h on a LED display These cards are available at the electronic or computer market around the world 5 2 Boot Process While performing the functions of the traditional BIOS the Phoenix SCT core follows the firmware model described by the Intel Platform Innovation Framework for EFI The framework is associated with the following boot phases which can be described by various state codes Security SEC in...

Page 79: ...ity operates with PS 2 keyboards USB keyboards when enabled and through the console redirection facility when enabled The table below briefly describes the primary menus most of which have sub menus The following sections describe the menus in detail The Phoenix SCT navigation can be accomplished using a combination of the keys These keys include the FUNCTION keys ENTER ESC ARROW keys and so on Ta...

Page 80: ...nge the field value of a particular setup item ESC The Esc key allows you to discard any changes the user has made and exit the Phoenix SCT Setup When you are in sub menu Esc allows you to exit to the upper menu Function keys When other function keys become available they are displayed at the right of the screen along with their intended function Table 5 2 Phoenix Navigation Key Description ...

Page 81: ...e time and date month day year format To change these values go to each field and enter the desired value Press the tab key to move from hour to minute to second or from month to day to year There is no default value System Time System Information Shows the BIOS version CPU type memory type and size and so on See Table System Information Field Description on page 81 ...

Page 82: ...on Shows the BIOS version Build Time Shows the BIOS build time Processor Type Shows the CPU manufacturer brand Processor Speed Shows the CPU current frequency System Memory Speed Shows the system memory current frequency L2 Cache RAM Shows the CPU L2 cache size Total Memory Shows all memory size Memory Mode Memory work mode Memory Channel A Slot0 Channel A slot0 memory size and type Memory Channel...

Page 83: ...ion Field Description Boot Configuration Sets boot configuration See Boot Configuration Processor Configuration Sets CPU configuration See Processor Configuration Peripheral Configuration Sets system peripheral configuration See Processor Power Management HDD Configuration Sets hard drive and controller configuration See HDD Configuration ...

Page 84: ... Configuration AMT Configuration Configures Active Management Technology parameters See AMT Configuration ME Configuration Configures Management Engine Technology parameters ME Configuration Table 5 6 Advanced Menu Field Description continued Field Description Table 5 7 Boot Configuration Field Description Field Description Quick Boot Enables Disables quick boot Console Redirection Enables Disable...

Page 85: ...tion DEP Intel Virtualization Technology When enabled a VMM can utilize the additional hardware capabilities Fast Boot Memory Initialization Enable this to reduce the amount of time spent initializing memory during a cold boot Processor Power Management Processor power management configuration see later description Table 5 9 Processor Power Management Field Description Field Description Intel Spee...

Page 86: ...D Configuration Field Description Field Description SATA Device Enables Disable sSATA device Interface Combination Selects the SATA controllers operation mode RAID Alternate Device ID Changes the device ID to 292X from 282X in RAID mode to prevent the IMSM driver from loading on the platform Software Feature Mask Config Software Feature Mask Config See Software Feature Mask Configuration Serial AT...

Page 87: ...re RAID10 Enables Disables RAID10 feature RAID5 Enables Disables RAID5 feature Table 5 13 Memory Configuration Field Description Field Description Memory Frequency Maximum memory frequency selections in Mhz Table 5 14 SA Configuration Field Description Field Description Intel R VT for Directed I O VT d Press Enter to bring up the Intel R VT for directed I O VT d configuration menu See Intel R VT f...

Page 88: ... device assignment to VMM through DMAR ACPI tables Table 5 16 Graphics Configuration Field Description Primary Display Selection Selects the primary display device DVMT Pre Allocated Selects pre allocated graphics memory size used by the internal graphics device This has no effect if external graphics are present DVMT Total Gfx Mem DVMT5 0 DVMT graphics memory size This has no effect if external g...

Page 89: ...raphics are present IGD Active LFP Selects the active LFP configuration Panel Color Depth Selects the LFP panel color depth Table 5 18 South Bridge Configuration Field Description Field Description DeepSx Mode Configures the DeepSx Mode configuration State After G3 Specifies what state to switch to when power is re applied after a power failure G3 State Watchdog Timer Enables or Disables Watchdog ...

Page 90: ...onfig PCI Express Port 6 is dedicated to LAN Table 5 20 PCI Express Port 3 7 8 Configuration Field Description Field Description PCI Express Root Port 3 7 8 Controls the PCI express root port Table 5 21 SB USB Configuration Field Description Field Description EHCI1 Controls the USB EHCI USB 2 0 functions EHCI2 Controls the USB EHCI USB 2 0 functions USB Ports Per Port Disabled Control Controls eac...

Page 91: ...ernal LAN LAN OPROM Selection This is used to select LAN OPROM for quick boot minimal configuration Wake on PCH LAN Enables PCH Internal wake on LAN capability Table 5 24 AMT Configuration Field Description Field Description Intel AMT Enables Disables Intel R Active Management Technology BIOS Extension Note iAMT H W is always enabled This option just controls the BIOS extension execution If enable...

Page 92: ...igures ME without a password USB R Feature Enables Disables USB R Table 5 24 AMT Configuration Field Description continued Field Description Table 5 25 ME Configuration Field Description Field Description ME FW Version Intel Management Engine firmware version ME Firmware Intel Management Engine firmware state Intel ME Enables Disables Intel Management Engine ...

Page 93: ...llation and Use 6806800M10H 92 5 4 3 Security Menu 5 4 3 1 Trusted Platform Module TPM Configuration Figure 5 3 Security Menu Table 5 26 TPM Configuration Field Description Field Description Current TPM State Current TPM State ...

Page 94: ...tion and Use 6806800M10H 93 5 4 4 Boot Menu Change TPM States Changes TPM state Note Most TPM options require TPM to be Enabled to take effect Table 5 26 TPM Configuration Field Description Field Description Figure 5 4 Boot Menu ...

Page 95: ...10 save all changes of all menus then exit setup configure driver Finally resets the system automatically Exit Discarding Changes Equal to ESC never save changes then exit setup configure driver Finally resets the system automatically Load Setup Defaults Equal to F9 Load standard default values Load Optimized Defaults Load settings for optimized boot time and system performance ...

Page 96: ...original value of this boot time Not the default setup value Save Changes Save all changes of all menus but do not reset system Table 5 27 Exit Menu Field Description continued Field Description Table 5 28 Driver Control Table XP 32bit XP 64bit Win7 32bit Win7 64bit E 7 32bit E 7 64 bit Fedora Chipset Yes Yes Yes Yes Yes Yes Yes Graphic Yes Yes Yes Yes Yes Yes Yes LAN Yes Yes Yes Yes Yes Yes Yes A...

Page 97: ...oot PCI Express Ethernet Controller 5 6 BIOS Status Codes The following tables list the BIOS status codes applicable to the MITX CORE 820 5 6 1 Status Code Ranges Table 5 29 ACPI Wake Up Support Matrix Power Button PS2 KB MS USB KB MS Onboard LAN S3 Yes Yes Yes Yes S4 Yes No No Yes S5 Yes No No Yes Table 5 30 Status Code Ranges Status Code Range Description 0x20 0xDF Component status codes 0x00 0x...

Page 98: ...TCODE_CC_CPU_IO 0x27 POSTCODE_CC_BOOT_SCRIPT 0x28 POSTCODE_CC_STATUS_CODE 0x29 POSTCODE_CC_DATA_HUB 0x2A POSTCODE_CC_HII_DATABASE 0x2B POSTCODE_CC_RESET 0x2C POSTCODE_CC_METRONOME 0x2D POSTCODE_CC_INTERRUPT_CONTROLLER 0x2E POSTCODE_CC_DIAGNOSTIC_SUMMARY 0x2F POSTCODE_CC_SMBIOS 0x30 POSTCODE_CC_SMM_COMMUNICATION 0x31 POSTCODE_CC_SMM_RUNTIME 0x32 POSTCODE_CC_SMM_SERVICES 0x33 POSTCODE_CC_FIRMWARE_DE...

Page 99: ...0x08 POSTCODE_PC_COMP_SMM_INIT 0x09 POSTCODE_EC_DEVICE_ERROR 0x0A POSTCODE_EC_RESOURCE_ERROR 0x0B POSTCODE_EC_DATA_CORRUPT Table 5 33 Architectural Status Codes Status Code Code Symbol 0xE0 POSTCODE_PC_SEC_ENTRY 0xE1 POSTCODE_PC_SEC_EXIT 0xE2 POSTCODE_PC_PEI_ENTRY 0xE3 POSTCODE_PC_PEI_EXIT 0xE4 POSTCODE_PC_IPL_DXE 0xE5 POSTCODE_PC_IPL_S3 0xE6 POSTCODE_PC_S3_OS 0xE7 POSTCODE_PC_IPL_RECOVERY 0xE8 PO...

Page 100: ...5 8 BIOS Update The following procedure allows you to update the BIOS 1 Prepare a dos bootable USB thumb drive 2 Get the BIOS flash tool Pflash exe from the BIOS vendor 3 Copy the Pflash exe and BIOS ROM file into the USB thumb drive 4 Power on the MITX CORE 820 board 5 Press F2 to enter the BIOS setup menu 6 Select the USB thumb drive as the first boot device 7 Save and reset then the enclosure w...

Page 101: ...BIOS MITX CORE 820 Installation and Use 6806800M10H 100 ...

Page 102: ...o available for battery charging and monitoring firmware EC firmware is also fully functional in ACPI SCI or legacy environments In the MITX CORE 820 the NPCE791C from Nuvoton was selected as the EC silicon It provides the power sequence controller PS2 KB MS interface battery management thermal temperature fan speed control serial port and LED controller The following diagram shows the system bloc...

Page 103: ...ost significant byte HCBAL and HCBAH registers are set to their default values by power up reset and input reset HCBAH is set to 00h HCBAL is set to 4Eh to Super I O configuration index data address of 4E 4Fh However the HCBAL and HCBAH registers can be modified by a special process please refer to NPCE791x datasheet 6 2 3 Blanked Logical Device Register Structure Each functional block is associat...

Page 104: ... control and device configuration registers arereplicatedoverthebanksofeachlogicaldevice Two dimensionalindexingisusedtoaccess a specific register in a specific bank the LDN register which selects the bank and the index 11h Power Management I F Channel 1 12h Power Management I F Channel 2 17h Power Management I F Channel 3 1Dh Extended Shared Memory Table 6 1 LDN Values continued LDN Functional Bl...

Page 105: ...cessing the data register while the index register holds a value of 30h or higher actually accesses the logical device configuration registers These are currently pointed to by the index register within the logical device currently selected by the LDN register Figure 6 2 Structure of Standard Configuration Register ...

Page 106: ...1 24h Super I O Chip Revision 25h Super I O Configuration 5 26h Super I O Configuration 6 27h Super I O Revision ID 28h Super I O General Purpose Scratch 29h Super I O Configuration 9 2Dh Super I O Configuration D 2Eh 2Fh Reserved for Nuvoton use 30h Logical Device Control Activate Enable or disable the logical device 60h 61h IO Base Address Descriptor 0 Indicates selected I O lower limit address ...

Page 107: ...can be optionally mapped to other I O address 6 2 6 1 EC Status Register The following table shows the EC status I O Port Register Table 6 3 Mapping of Host Interface Registers to the Host Processor Port Legacy Address Internal Chip Select Type Register Name Keyboard and Mouse 60h Keyboard Mouse Data Write Data 64h Keyboard mouse Command Write Command 60h Keyboard Mouse Data Read Data 64h Keyboard...

Page 108: ...ss port is data port 2 Reserved 1 IBF Input buffer full flag 0 OBF Output buffer full flag Table 6 4 EC Status I O Port Register continued Status Bit Name Description Table 6 5 EC Command Register Value Command Description 80h EC Read Read operation for an internal register in EC space 81h EC Write Write operation for an internal register in EC space 82h EC Burst Enable Enable EC burst operation m...

Page 109: ...h data in 81h Write EC Write EC_CMD with 81h Wait SCI for IBF 0 Write address byte to EC_DAT Wait SCI for IBF 0 Write data byte to EC_DAT Wait SCI for IBF 0 82h Burst Enable Write EC_CMD with 82h Wait SCI for OBF 1 Read EC_DAT with 90h 83h Burst Disable Write EC_CMD with 83h Wait SCI for IBF 0 84h Query EC Write EC_CMD with 84h Wait SCI for OBF 1 Read EC_DAT with SCI ID number Table 6 7 EC Space D...

Page 110: ... 1 CPU Level 5 Hysteresis 0x14 1 CPU Level 6 Trip 0x15 1 CPU Level 6 Hysteresis 0x16 1 Throttling on threshold 0x17 1 Throttling off threshold 0x18 1 System Level 1 Trip 0x19 1 System Level 1 Hysteresis 0x1A 1 System Level 2 Trip 0x1B 1 System Level 2 Hysteresis 0x1C 1 System Level 3 Trip 0x1D 1 System Level 3 Hysteresis 0x1E 1 System Level 4 Trip 0x1F 1 System Level 4 Hysteresis 0x20 1 System Lev...

Page 111: ... 5 Hysteresis 0x2E 1 VGA Level 6 Trip 0x2F 1 VGA Level 6 Hysteresis 0x30 1 Core1 Level 1 Trip 0x31 1 Core1 Level 1 Hysteresis 0x32 1 Core1 Level 2 Trip 0x33 1 Core1 Level 2 Hysteresis 0x34 1 Core1 Level 3 Trip 0x35 1 Core1 Level 3 Hysteresis 0x36 1 Core1 Level 4 Trip 0x37 1 Core1 Level 4 Hysteresis 0x38 1 Core1 Level 5 Trip 0x39 1 Core1 Level 5 Hysteresis 0x3A 1 Core1 Level 6 Trip 0x3B 1 Core1 Lev...

Page 112: ...ore2 Level 6 Hysteresis 0x48 1 CPU temperature 0x49 1 System temperature 0x4A 1 VGA temperature 0x4B 1 CORE 1 0x4C 1 CORE 2 0x4D 1 CPU Offset 0x4E 1 CPU temperature for shutdown system 0x4F 1 Fan speed to be set 0x50 1 Throttling State 0x51 1 System Configuration Byte 0x52 1 Device Status Byte 0x90 1 Power Status 0x91 1 Reserved 0x92 2 Battery Voltage 0x94 2 Battery Current 0x96 2 Battery Relative...

Page 113: ...verage Time to Full 0xA8 2 Battery Manufacture Date 0xAA 2 Battery Serial Number 0xAC 2 Battery Charging Current 0xAE 2 Battery Charging Voltage 0xB0 2 Battery Temperature Table 6 7 EC Space Definition continued Table Offset Length Bytes Description Table 6 8 Q Event List Q Event ID Description _Q30 Real AC Insertion Removal Event _Q31 Real Battery Insertion Removal Event _Q32 Real Battery Low Eve...

Page 114: ...The ACPI compliant operating systems provide the embedded controller driver and battery driver 6 3 EC Firmware Porting 6 3 1 Power Sequence Control The hardware provides the power sequencing table The following tables should be filled to implement the platform s various power sequences ...

Page 115: ...0x02 INPUT 1 SB_PWROK PORT_PIN 4 2 HIGH 20 0x03 OUTPUT 2 RSMRST PORT_PIN 3 3 LOW 01 0x0A OUTPUT 3 PWRBTN_SB PORT_PIN 4 7 HIGH 01 0x7F OUTPUT 4 HW_PWRGD PORT_PIN 0 7 HIGH 00 0x00 INPUT 5 SLP_S4 PORT_PIN 5 0 HIGH 100 0x04 OUTPUT 6 CPU_VR_ON PORT_PIN 3 0 HIGH 120 0x06 INPUT 7 ALLPWROK UNUSED_PIN LOW 00 0x00 OUTPUT 8 UNUSED_PIN LOW 00 0x00 OUTPUT 9 PORT_PIN 1 0 HIGH 01 0x0B INPUT A SLP_S3 PORT_PIN 4 4...

Page 116: ...00 OUTPUT 6 Reserved UNUSED_PIN LOW 00 0x00 OUTPUT 7 Reserved UNUSED_PIN LOW 00 0x00 INPUT 8 Reserved UNUSED_PIN LOW 00 0x00 INPUT 9 Reserved UNUSED_PIN LOW 00 0x00 OUTPUT A Reserved const PWRSEQ_DESCRIPTOR SuspendSeq_Table A B C D E PORT_PIN 4 7 LOW 01 0x01 OUTPUT 0 HW_PWRGD PORT_PIN 5 0 LOW 100 0x02 OUTPUT 1 CPU_VR_ON PORT_PIN 4 5 LOW 01 0x7F OUTPUT 2 MAINON UNUSED_PIN LOW 00 0x00 OUTPUT 3 Reser...

Page 117: ...OEM_PECI_Polling void const PWRSEQ_DESCRIPTOR ResumeSeq_Table A B C D E PORT_PIN 4 4 HIGH 01 0x01 OUTPUT 0 SUSON PORT_PIN 4 5 HIGH 01 0x02 OUTPUT 1 MAINON PORT_PIN 3 0 HIGH 120 0x03 INPUT 2 ALLPWROK PORT_PIN 5 0 HIGH 100 0x04 OUTPUT 3 CPU_VR_ON PORT_PIN 4 7 HIGH 01 0x7F OUTPUT 4 HW_PWRGD UNUSED_PIN LOW 00 0x00 INPUT 5 Reserved UNUSED_PIN LOW 00 0x00 OUTPUT 6 Reserved UNUSED_PIN LOW 00 0x00 OUTPUT ...

Page 118: ...e the PECI module PECI_Init PECI_CallBack 0 Configure PECI domain and client address PECI_SetDomain PECI_DOMAIN PECI_SetAddress PECI_CLIENT_ADDR peci_client_available 0 void OEM_PECI_Polling void if REG_READ PECI_CTL_STS 0x01 If PECI not busy if peci_client_available PECI_GetTemp else PECI_Ping ...

Page 119: ...trip levels The following table shows the instances of these levels 6 3 3 2 Thermal Throttling There is no applicable thermal throttling settings 6 3 4 Battery Information Charging Discharging Control The hardware selects a battery so the EC firmware could report the battery information and write the code for charging and discharging There are five charging states Wake up charging Pre charging Tab...

Page 120: ...Charging protection Terminate charging Report from battery Over voltage Over temperature Maximum safety time Discharging Terminated discharging detected Shutdown system Avoid battery damaged Hardware should select a battery 6 3 5 Voltage Monitor The MITX CORE 820 uses the EC pins to monitor the following voltages 5V 3 3V 1 5V 1 5V EC should be able to read the voltage and if possible should have a...

Page 121: ...ttery Status Green LED Status Red LED Status Charging Inactive Active Fully Charged Active Inactive Discharging Inactive Inactive Battery Low Inactive Blinking const LEDs_DESCRIPTOR LEDs_Table PORT_PIN 3 2 LOW 0x00 0 Battery LED Green PORT_PIN 3 1 LOW 0x00 1 Battery LED RED UNUSED_PIN LOW 0x00 2 Scroll Lock LED UNUSED_PIN LOW 0x00 3 CAPS Lock LED UNUSED_PIN LOW 0x00 4 NUMLock LED UNUSED_PIN LOW 0x...

Page 122: ...and AC adaptor In Out could be detected through the event table below However the MITX CORE 820 does not have a GPIO pin for the battery in out detection EC uses the SMBUS polling method to detect if the battery is present Time Base is 10mS A PORT PIN definition for Events B Active HIGH or LOW C Event debounce counter D ACTION of event const EVENT_DESCRIPTOR Events_Table A B C D PORT_PIN 0 3 LOW 1...

Page 123: ...on either 16 bit DOS or Windows XP Vista 32 bit 64 bit It programs the flash of the Nuvoton EC with the contents of a flash binary image file which holds EC firmware and or system BIOS 6 4 4 Crisis Recovery The NPCE791x BOOTER Program resides in the on chip ROM After reset it performs all boot procedures including NPCE791x initialization based on the header data Then it checks the EC firmware in t...

Page 124: ...stallation and Use 6806800M10H 123 6 5 2 JTAG Interface The MITX CORE 820 provides JTAG interface for the NPCE791x silicon Connect the USB to the JTAG board with the Gala board through the ECDT utility to debug the EC firmware ...

Page 125: ...Firmware MITX CORE 820 Installation and Use 6806800M10H 124 ...

Page 126: ...X CORE 820 Installation and Use 6806800M10H 125 A Replacing the Battery A 1 Overview The board contains an on board Lithium coin battery BR2032 Its location is show in the following figure Figure A 1 Battery Location ...

Page 127: ...same battery models If the respective battery model is not available contact your local Artesyn sales representative for the availability of alternative and officially approved battery models Data Loss If the battery no longer provides enough power the RTC is initialized and the data in the NVRAM is lost Exchange the battery before one year of actual battery use has elapsed Data Loss Exchanging th...

Page 128: ...n marked on it is face up PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder To prevent this damage do not use a screw driver to remove the battery from its holder Product Damage Do not deform the battery holder retaining tab during the battery exchange procedure so that the battery holder retaining tab continues to perform its function ...

Page 129: ...Replacing the Battery MITX CORE 820 Installation and Use 6806800M10H 128 ...

Page 130: ...s you can also visit our Web site for the latest copies of our product documentation 1 Go to www artesyn com computing 2 Under SUPPORT click TECHNICAL DOCUMENTATION 3 Under FILTER OPTIONS click the Document types drop down list box to select the type of document you are looking for 4 In the Search text box type the product name and click GO Table B 1 Artesyn Embedded Technologies Embedded Computin...

Page 131: ...Related Documentation MITX CORE 820 Installation and Use 6806800M10H 130 ...

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Page 133: ...esyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners 2014 Artesyn Embedded Technologies Inc ...

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