ARM ARM9TDMI, Technical Reference Manual

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Debug Support
5-20 Copyright © 1998, 1999 ARM Limited. All rights reserved. ARM DDI0145B
The IEEE format of the ID register is as shown in Table 5-2:
5.6.3 Instruction register
Purpose Changes the current TAP instruction.
Length 4 bits.
Operating mode When in SHIFT-IR state, the instruction register is selected as the
serial path between
TDI and TDO .
During the CAPTURE-IR state, the value 0b0001 is loaded into this register. This is
shifted out during SHIFT-IR (least significant bit first), while a new instruction is
shifted in (least significant bit first). During the UPDATE-IR state, the value in the
instruction register becomes the current instruction. On reset, IDCODE becomes the
current instruction.
5.6.4 Scan chain select register
Purpose Changes the current active scan chain.
Length 5 bits.
Operating mode After SCAN_N has been selected as the current instruction, when
in SHIFT-DR state, the scan chain select register is selected as the
serial path between
TDI and TDO .
During the CAPTURE-DR state, the value 0b10000 is loaded into this register. This is
shifted out during SHIFT-DR (least significant bit first), while a new value is shifted in
(least significant bit first).
During the UPDATE-DR state, the value in the register selects a scan chain to become
the currently active scan chain. All further instructions such as INTEST then apply to
that scan chain.
Table 5-2 ID code register
Bits Contents
31–28 Version number
27–12 Part number
11–1 Manufacturer identity
0 1