Memory Interface
3-14
Copyright © 2001, 2004 ARM Limited. All rights reserved.
ARM DDI 0210C
3.5
Address timing
The ARM7TDMI processor address bus can operate in one of two configurations:
•
pipelined
•
depipelined.
Note
ARM Limited strongly recommends that pipelined address timing is used in new design
to obtain optimum system performance.
ARM Limited strongly recommends that
ALE
is tied HIGH and not used in new
designs.
Address depipelined configuration is controlled by the
APE
or
ALE
input signal. The
configuration is provided to ease the design of the ARM7TDMI processor in both
SRAM and DRAM-based systems.
APE
affects the timing of the address bus
A[31:0]
, plus
nRW
,
MAS[1:0]
,
LOCK
,
nOPC
, and
nTRANS
.
In most systems, particularly a DRAM-based system, it is desirable to obtain the
address from ARM7TDMI processor as early as possible. When
APE
is HIGH then the
ARM7TDMI processor address becomes valid after the rising edge of
MCLK
before
the memory cycle to which it refers. This timing allows longer periods for address
decoding and the generation of DRAM control signals. Figure 3-8 shows the effect on
the timing when
APE
is HIGH.
Figure 3-8 Pipelined addresses
SRAMs and ROMs require that the address is held stable throughout the memory cycle.
In a system containing SRAM and ROM only,
APE
can be tied permanently LOW,
producing the desired address timing. In this configuration the address becomes valid
after the falling edge of
MCLK
as shown in Figure 3-9 on page 3-15.
MCLK
APE
A[31:0]
D[31:0]
nMREQ
SEQ
Summary of Contents for ARM7TDMI
Page 6: ...Contents vi Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Page 10: ...List of Tables x Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Page 14: ...List of Figures xiv Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Page 46: ...Introduction 1 26 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Page 120: ...Coprocessor Interface 4 18 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Page 142: ...Debug Interface 5 22 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...
Page 282: ...Glossary Glossary 6 Copyright 2001 2004 ARM Limited All rights reserved ARM DDI 0210C ...