Figure 28.
The DDR3 Tab
The following sections describe the controls on the DDR3 tab.
Start
Initiates DDR3 memory transaction performance analysis.
Stop
Terminates transaction performance analysis.
Performance Indicators
These controls display current transaction performance analysis information collected
since you last clicked Start:
•
Write, Read and Total performance bars: Shows the percentage of maximum
theoretical data rate that the requested transactions are able to achieve.
•
Write (MBps), Read(MBps) and Total(MBps): Show the number of bytes of
data analayzed per second.
•
Data Bus: 72 bits (8 bits ECC) wide and frequency is 1066 MHz double data rate.
2133 Mbps per pin. Equating to a theoretical maximum bandwidth of 136512 Mbps
or 17064 MBps.
Error Control
This control displays data errors detected during analysis and allows you to insert
errors:
6. Board Test System
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10 GX FPGA Development Kit User Guide
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