•
Detected errors: Displays the number of data errors detected in the hardware.
•
Inserted errors: Displays the number of errors inserted into the transaction
stream.
•
Insert: Inserts a one-word error into the transaction stream each time you click
the button. Insert Error is only enabled during transaction performance analysis.
•
Clear: Resets the Detected errors and Inserted errors counters to zeroes.
Number of Addresses to Write and Read
Determines the number of addresses to use in each iteration of reads and writes.
6.3.9. The DDR4 Tab
This tab allows you to read and write DDR4 memory on your board.
Figure 29.
The DDR4 Tab
The following sections describe the controls on the DDR4 tab.
Start
Initiates DDR4 memory transaction performance analysis.
Stop
Terminates transaction performance analysis.
6. Board Test System
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10 GX FPGA Development Kit User Guide
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