Read
Reads the current frequency setting for the oscillator associated with the active tab.
Default
Sets the frequency for the oscillator associated with the active tab back to its default
value. This can also be accomplished by power cycling the board.
Set Freq
Sets the programmable oscillator frequency for the selected clock to the value in the
CLK0 to CLK3 controls for the Si5338. Frequency changes might take several
milliseconds to take effect. You might see glitches on the clock during this time. Intel
recommends resetting the FPGA logic after changing frequencies.
Import
Import register map file generated from Silicon Laboratories ClockBuilder Desktop.
6. Board Test System
UG-20046 | 2018.07.20
Intel
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Stratix
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10 GX FPGA Development Kit User Guide
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