Altera Arria 10 FPGA, User Manual

Page: 95 / 103

Board Reference Schematic Signal
Name
FPGA Pin
Number
I/O Standard Description
D4 FLASH_
RESETN
BA23 1.8 V Reset
G8 FLASH_WEN BD26 1.8 V Write enable
C6 FLASH_WPN — 1.8 V Write protect
A1 FM_A1 AM11 1.8 V Address bus
B1 FM_A2 AM12 1.8 V Address bus
C1 FM_A3 AL12 1.8 V Address bus
D1 FM_A4 AN13 1.8 V Address bus
D2 FM_A5 AM13 1.8 V Address bus
A2 FM_A6 AE12 1.8 V Address bus
C2 FM_A7 AN15 1.8 V Address bus
A3 FM_A8 AL10 1.8 V Address bus
B3 FM_A9 AR10 1.8 V Address bus
C3 FM_A10 AP11 1.8 V Address bus
D3 FM_A11 AL13 1.8 V Address bus
C4 FM_A12 AH11 1.8 V Address bus
A5 FM_A13 AN14 1.8 V Address bus
B5 FM_A14 AG11 1.8 V Address bus
C5 FM_A15 AH10 1.8 V Address bus
D7 FM_A16 AF14 1.8 V Address bus
D8 FM_A17 AF15 1.8 V Address bus
A7 FM_A18 AH14 1.8 V Address bus
B7 FM_A19 AJ12 1.8 V Address bus
C7 FM_A20 AJ14 1.8 V Address bus
UG-01170
2015.06.26
Flash
5-49
Board Components
Altera Corporation
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