Schematic Signal Name
Pin Number
I/O Standard
Description
ED8101_SCL
A8
2.5 V
ED8101 I2C clock signal
ED8101_SDA
A9
2.5 V
ED8101 I2C data signal
FPGA Configuration
Configuring the FPGA Using Programmer
You can use the Quartus II Programmer to configure the FPGA with your SRAM Object File (.sof).
Ensure the following:
• The Quartus II Programmer and the USB-Blaster II driver are installed on the host computer.
• The micro-USB cable is connected to the FPGA development board.
• Power to the board is on, and no other applications that use the JTAG chain are running.
1. Start the Quartus II Programmer.
2. Click Auto Detect to display the devices in the JTAG chain.
3. Click Change File and select the path to the desired
.sof
.
4. Turn on the Program/Configure option for the added file.
5. Click Start to download the selected file to the FPGA. Configuration is complete when the progress
bar reaches 100%.
Using the Quartus II programmer to configure a device on the board causes other JTAG-based
applications such as the Board Test System and the Power Monitor to lose their connection to the board.
Restart those applications after configuration is complete.
Status Elements
The Arria 10 GX FPGA development board includes status LEDs.
Table 5-3: Board-Specific LEDs
Board Reference
Schematic Signal Name
I/O Standard
D16
MAX_ERROR
2.5 V
D15
MAX_LOAD
2.5 V
D17
MAX_CONF_DONE
2.5 V
D1
FMCA_TX_LED
1.8 V
D2
FMCA_RX_LED
1.8 V
UG-01170
2015.06.26
FPGA Configuration
5-15
Board Components
Altera Corporation
