Altera Arria 10 FPGA, User Manual

Page: 77 / 103

Board Reference Schematic Signal Name FPGA Pin Number I/O Standard
R3 MEM_ADDR_CMD25 P33
1.5 V
L2 MEM_ADDR_CMD26 F32
1.5 V
K1 MEM_ADDR_CMD27 T35
1.5 V
P2 MEM_ADDR_CMD28 T34
1.5 V
N4 MEM_ADDR_CMD29 E35
1.5 V
P4 MEM_ADDR_CMD30 U32
1.5 V
N3 MEM_ADDR_CMD31 T32
1.5 V
V2 MEM_CLK_N R31
1.5 V
V1 MEM_CLK_P R30
1.5 V
B10 MEM_DMA0 E26
1.5 V
C4 MEM_DMA1 G27
1.5 V
B17 MEM_DMA2 A29
1.5 V
F17 MEM_DMA3 F30
1.5 V
M16 MEM_DMB0 AB32
1.5 V
U16 MEM_DMB1 AG31
1.5 V
U11 MEM_DMB2 Y35
1.5 V
U6 MEM_DMB3 AC34
1.5 V
R6 MEM_DQ_ADDR_
CMD0
A32
1.5 V
T1 MEM_DQ_ADDR_
CMD1
A33
1.5 V
R2 MEM_DQ_ADDR_
CMD2
B32
1.5 V
T2 MEM_DQ_ADDR_
CMD3
D32
1.5 V
UG-01170
2015.06.26
HiLo External Memory Interface
5-31
Board Components
Altera Corporation
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