Altera Arria 10 FPGA, User Manual

Page: 54 / 103

Schematic Signal Name Pin Number
I/O Standard Description
FM_D1 L16 1.8 V
FM data bus
FM_D2 L14 1.8 V
FM data bus
FM_D3 K14 1.8 V
FM data bus
FM_D4 L13 1.8 V
FM data bus
FM_D5 L15 1.8 V
FM data bus
FM_D6 M15 1.8 V
FM data bus
FM_D7 M16 1.8 V
FM data bus
FM_D8 K16 1.8 V
FM data bus
FM_D9 K15 1.8 V
FM data bus
FM_D10 J14 1.8 V
FM data bus
FM_D11 K13 1.8 V
FM data bus
FM_D12 L12 1.8 V
FM data bus
FM_D13 N16 1.8 V
FM data bus
FM_D14 M13 1.8 V
FM data bus
FM_D15 L11 1.8 V
FM data bus
FM_D16 E4 1.8 V
FM data bus
FM_D17 F6 1.8 V
FM data bus
FM_D18 F4 1.8 V
FM data bus
FM_D19 C2 1.8 V
FM data bus
FM_D20 D1 1.8 V
FM data bus
FM_D21 F1 1.8 V
FM data bus
FM_D22 E3 1.8 V
FM data bus
FM_D23 G2 1.8 V
FM data bus
FM_D24 E5 1.8 V
FM data bus
5-8
MAX V CPLD System Controller
UG-01170
2015.06.26
Altera Corporation
Board Components
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