CPCI-QIPC REFERENCE MANUAL
ALPHI TECHNOLOGY CORP.
Page iii
Ver 1.1
Part Number :
739-11-000-4000
Copyright ALPHI Technology Corporation ,1998
TABLE OF CONTENTS
1.
GENERAL DESCRIPTION_______________________________________________1
1.1 INTRODUCTION__________________________________________________________ 1
1.2 FUNCTIONAL DESCRIPTION _______________________________________________ 1
1.3 REFERENCE MATERIALS LIST _____________________________________________ 5
2.
HOST (CPCI) SIDE ____________________________________________________6
2.1 CPCI CONFIGURATION REGISTERS _________________________________________ 6
2.2 CPCI BASE ADDRESS REGISTERS __________________________________________ 6
2.3 CPCI OPERATION REGISTERS _____________________________________________ 6
3.
C31 SIDE ____________________________________________________________7
3.1 INTERNAL ORGANIZATION ________________________________________________ 7
3.2 CPCI INTERFACE ________________________________________________________ 7
3.3 DUAL PORT MEMORY_____________________________________________________ 8
3.4 IP INTERFACE and PAGED MEMORY ________________________________________ 9
3.5 DSP MEMORY AND REGISTER MAP SUMMARY________________________________ 9
3.6 RESET SIGNALS ________________________________________________________ 12
3.7 LOCAL DSP INTERRUPT SOURCES ________________________________________ 12
4.
JUMPER DESCRIPTIONS ______________________________________________13
5.
LED INDICATORS ____________________________________________________14
6.
CONNECTIONS ______________________________________________________14
6.1 IP I/O CONNECTORS_____________________________________________________ 14
6.2 SERIAL RS232 PORT (P4) ________________________________________________ 14
6.3 SERIAL RS422 / RS485 PORT (P3) _________________________________________ 15
6.4 DSP SERIAL PORT (P15) _________________________________________________ 16
6.5 EMULATOR CONNECTION (P17) ___________________________________________ 16
6.6 32 BIT CPCI BUS (J1) ____________________________________________________ 16
6.7 Backplane I/O Connections (J4 and J5) _____________________________________ 16
6.8 FACTORY USE (P16)_____________________________________________________ 21
7.
STANDALONE OPERATION ___________________________________________21
7.1 CPCI RESET ___________________________________________________________ 21
7.2 CPCI BUS CLOCK _______________________________________________________ 21
