Allen-Bradley ControlLogix 1756-DMD30, User Manual, Page: 130 / 369

Publication 1756-UM522B-EN-P - February 2003
B-50 1756-DMD30 Specific Information
167 Motor Ctrl Ackn
Displays the Motor Control Processor's acknowledgment to the
Velocity Processor for the Motor Control Command bits.
Default: 0000 0000 0000 0000
Options: Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15 Arm Enabl
Arm ID Done
Arm AlphaMin
Arm AlphaMax
Field Enable
Fld ID Done
Fld AlphaLim
Reserved
Fault Detect
Warning Detect
AC Phase ABC
Phase Ready
Reserved
Rail I/O OK
PMI Syncd
PMI O SLoaded
File:
Group: Monitor
Control Status
168 Drive I/O Ctrl
Set bits to control PMI functions.
Default: 0000 0000 0000 0000
Options: Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15 Reserved
M-Cont Out
Ext Flt LED
Reserved
Aux Output
Reserved
Enbl Res Bal
Reserved
Ext Strobe
Ext StrobeFE
Dis BrknWire
Reserved
Reserved
Reserved
Reserved
DM Fiber Tst
File:
Group: Dynamic Control
Configuration
No. Name
Description Values