Rev. 1.43
User's
Guide
15
The IP interface uses two processor chip selects to address all IP module spaces.
The Chip Select 4 is used to control the IP I/O, ID, and INT spaces.
The Chip Select 5 is used to control the IP memory spaces.
Each IP slot has is own set of registers to have the four IP slots fully independent.
The VSBC-6862 supports the two IRQ available on the IP modules.
Each IP slot has an own IRQ level attributed to the MPC-8260. If the both IRQ are active at the same
time on an IP module, the VSBC-6862 handles the IP IRQ 0 first, and then IP IRQ 1.
The IP DMA channels are controlled by the IDMA channels, with IP Slot A controlled by IDMA1, Slot B
controlled by IDMA2, Slot C controlled by IDMA3 and Slot D controlled by IDMA4
2.6. Board registers
The VSBC-6862 contains several registers for board features.
These registers are mapped in the same Chip Select 4 than the IP ID and I/O spaces.
These features can be divided in three functions:
•
General board functions
Two registers are used to generate Reset on the board and to read the rotary
switch
value.
•
IP functions
Each of the four IP slot owns his set of registers to define and use IP modules.
•
VME functions
Each VME window owns his set of registers to define and use
the
VME
bus.
2.7. VME interface
There is a VME master, slave, interrupter, interrupt-handler and system controller modules.
Each module can be considered as an independent module.
Some functions are controlled by jumpers for the VME module, as for Slot1function or Reset
utilization.
The VME master A32/A24/A16/D32/D16/D8
Two windows are available to access the VME bus.
They are controlled by the chip selects CS6 and CS7.
The release modes are selectable between ROR and RWD modes.
The VME slave A24/A16/D32/D16/D8
Two windows are available from VME bus:
An A16 window to access VME registers, including mailbox
An A24 window to access the VSBC-6862 memory spaces.
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