VSBC-6862
Rev 1.43
64
4.7.4. VME slave
The VSBC-6862 is slave A16/A24/D32/D16/D8.
The board contains an independent slave module. This module doesn't need the local processor to be
initialized to be active.
From VME, many zones are accessible:
The VME slave registers
The Flash memory bank 0
The SRAM memory
The Real Time Clock device
Accessing one of these zone at the same time from VME and local processor will naturally start an
internal arbitration between these two masters and keep the 'loosing' master in a wait state while the
'winning' master can use the zone.
It’s to be noticed that an external VME access to one of these zones (VSBC-6862 slave access), will
not block the local processor with the SDRAM, IP modules, or communication ports. For example, the
MPC-8260 can access the SDRAM at the same time an external VME master accesses the local
SRAM. Moreover, an external master can access the VSBC-6862, while it is not initialized. All slave
functions are independent of the MPC-8260 state.
These zones are divided in two windows:
The A16 window
This window contains all VME registers.
This windows occupies 2kBytes.
Its base address is defined with 5 jumpers, for detailed information, please see J8 description.
VME slave register memory map:
Offset
Name
Mode
Description
Access
$1
VSMAIL
RW
VME Slave Mailbox
D8/D16
$3
VSBA24
RW
VME Slave Base Window Address
D8/D16
$5
VSWA24
RW
VME Slave Window A24 management
D8/D16
$7
VIVEC
RW
VME Interrupter Vector
D8/D16
$9
SRESR WO
VME
Software
Reset Register
D8/D16
For more flexibility, these registers are also accessible from the MPC-8620. This implies that for each
register, the user must choose to initialize the register either from VME, either from local processor to
avoid accesses at the same time by both sides.
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