AP522 ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 22 - http://www.acromag.com
- 22 -
www.acromag.com
The concatenation of the 8-bit registers TIMERMSB and TIMERLSB forms a
16-bit value which decides the time-out period of the Timer, per the
following equation:
Timer output frequency = Timer input clock / 16-bit Timer value
The least-significant bit of the timer is being bit [0] of the TIMERLSB with
most-significant-bit being bit [7] in TIMERMSB. Notice that these registers
do not hold the current counter value when read. Default value is zero
(timer disabled) upon powerup and reset. The ‘Reset Timer’ comm
and does
not have any effect on this register.
3.2.2.2 TIMERCNTL[7:0] Register
The bits [3:0] of this register are used to issue commands. The commands
are self-clearing, so reading this register does not show the last written
command. Reading this register returns a value of 0x01 when the Timer
interrupt is enabled and there is a pending Timer interrupt. It returns a value
of 0x00 at all other times. The default settings of the Timer, upon power-up,
a hardware reset or upon the issue of a ’Timer Reset’ command are:
•
Timer Interrupt Disabled
•
Re-triggerable mode selected
•
Internal 125MHz clock selected as clock source
•
Timer output not routed to MPIO[0]
•
Timer stopped
Table 3.6 Timer Control Register
TIMERCNTL[7:4] Reserved
TIMERCNTL[3:0] These bits are used to invoke a series of commands
that control the function of the Timer/Counter. The
commands 1100 to 1111 are reserved.
0001: Enable Timer Interrupt
0010: Disable Timer Interrupt
0011: Select One-shot mode
0100: Select Re-triggerable mode
0101: 125MHz clock as clock input for Timer
0110: not supported
0111: not supported
1000: De-route Timer output from MPIO[0]
1001: Start Timer
1010: Stop Timer
1011: Reset Timer
3.2.2.3 Timer Operation
The following paragraphs describe the operation of the 16-bit
Timer/Counter. The following conventions will be used in this discussion:
•
’
N
’
is the 16-bit value programmed in the TIMER MSB, LSB registers
