7-4
IM 253421-01E
Explanation
Setting the PLL source
For harmonic analysis, it is necessary to select the input to be used as the
fundamental frequency (PLL source) for synchronization. (PLL stands for Phase
Locked Loop.)
• V1: Sets the voltage as the PLL source.
• A1: Sets the current as the PLL source.
Note
•
If the fundamental frequency of the PLL source cannot be measured due to fluctuations or
distortion, it is not possible to obtain correct measurement results. In this case, it is
suggested that voltage with relatively small distortion be selected as the PLL source.
•
It is recommended to turn ON the filter in cases where the fundamental frequency is 300 Hz
or less and high frequency components are present.
•
If the amplitude of the input signal selected as the PLL source is smaller than the rated range
value, PLL synchronization may sometimes fail. In this case, it is suggested that a suitable
measurement range be selected so that the input level exceeds 30% of the rated range value.
Setting the Computation Method of Harmonic Distortion
The computation method of harmonic distortion can be selected from the following
two. In the following explanation a maximum of 50 analysis orders is assumed. In
case of a maximum less than 50, computation/display will be performed up to that
order.
• iEC: Computes the ratio of the rms value of the 2nd to 50th order component to
that of the fundamental (1st order).
• CSA: Computes the ratio of the rms value of the 2nd to 50th order component to
that of the rms value of the 1st to 50th component.
Computation Equation
In case of iEC
k=2
n
(C
k
)
2
/
C
1
In case of CSA
k=2
n
(C
k
)
2
/
k=1
n
(C
k
)
2
C1: Fundamental component (1st order)
Ck: Fundamental or harmonic component
k:
Analysis order
n:
Maximum order. The maximum order depends on the fundamental frequency of the
input set as the PLL source. For details, see chapter 16, “Specifications.”
7.2 Setting the PLL Source and Harmonic Distortion Method
