Winbond W928C73, Инструкция по эксплуатации

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Preliminary W928C73
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Descriptions Of Special Function Registers (SFRS), continued
ADDRESS
/NAME
BIT BIT NAME R/W 1 0 INITIAL FUNCTION
B3 WDIF R 0 Watchdog Timer Interrupt Flag:
If the watchdog interrupt is enabled, hardware will set this
bit to indicate that the watchdog interrupt has occurred. If
the interrupt is not enabled, then this bit indicates that the
time-out period has elapsed.
B2 WTRF X Watchdog Timer Reset Flag:
Hardware will set this bit when the watchdog timer causes
a reset. Software can read it but must clear it manually. A
power-fail reset will also clear the bit. This bit helps
software in determining the cause of a reset. If EWT = 0,
the watchdog timer will have no affect on this bit.
B1 EWT X Enable Watchdog timer Reset: Setting this bit will enable
the Watchdog timer Reset function.
D8H/WDCON
B0 RWT 0 Reset Watchdog Timer: This bit helps in putting the
watchdog timer into a know state. It also helps in resetting
the watchdog timer before a time-out occurs. Failing to set
the EWT before time-out will cause an interrupt, if EWDI
(EIE.4) is set, and 512 clocks after that a watchdog timer
reset will be generated if EWT is set. This bit is self-
clearing.
B7 P0IO.7 W 0 R/W control for P0.7 (key3):
No use, clear this bit to 0 after.
B6 P0IO.6 W 0 R/W control for P0.6 (key2):
1: input mode without pull high R
0: output mode or input with pull high R
Clear this bit after reset for key2 input with pull high R
function.
B5 P0IO.5 W 0 R/W control for P0.5 (key1):
1: input mode without pull high R
0: output mode or input with pull high R
Clear this bit after reset for key1 input with pull high R
function.
B4 P0IO.4 W 0 R/W control for P0.4 (key0):
1: input mode without pull high R
0: output mode or input with pull high R
Clear this bit after reset for key0 input with pull high R
function.
B3 P0IO.3 W 0 R/W control for P0.3:
Set this bit to “1” after reset for DEC_ADDT input
B2 P0IO.2 W 0 R/W control for P0.2:
Clear this bit to “0” after reset for F_ADR output function
B1 P0IO.1 W 0 R/W control for P0.1:
Set this bit to “1” after reset for DEC_SYNVAL input
D9H/P0IO
B0 P0IO.0 W 0 R/W control for P0.0:
Set this bit to “1” after reset.
For read-in F_data, set this bit to ”1”.
For write-out F_data, clear this bit to “0”.