3-2
3-3 .
MODEL 852
The i nput signal of Channe l 1 is appl ied through a 0 dB/20 dB Input Attenuator,
which contro l s the two avai lable gai n posi tions, and is fol lowed by a high i n put
impedance buffer ampl ifier . The Input Attenuator provides a constant 1 Megohm
resistance in either position . The output of the Buffer amp l i fier is appl ied to a
cascade of four " 2nd -Order Prototypes" . A " 2 nd-Order Prototype" is an active
RC, 2nd-order (1 2 dB/octave) Fi l ter section which is used as a bui lding b l ock to
synthesize higher-order
Fi
Iters. The gains of these stages at de and at cutoff are
as fol l ows:
Input Attenuator
Input Buffer
1 st Prototype
2nd Prototype
3rd Prototype
4th Prototype
Overa l l (OUT/I N )
G a i n a t d c
0 . 0
dB
+3 . 4 dB
+0.3 dB
+2 . 5 dB
+5 . 5 dB
+8 . 3 dB
+20 . 0 dB/O . O dB
Gain at Fe
0 . 0
- 2 0 . 0 dB
+3 . 4 dB
-5 . 5 dB
-1 . 9 dB
+4. 6 dB
+1 6 . 5 dB
+1 7 . 0 dB/ -3 . 0 dB
Cutoff Freguen cy control i s obtai ned by changing the resistors of the fi l ter i n
8 - 4 - 2 - 1 BCD steps . The capacitors are changed i n decade steps and
Option -01 adds an extra set of capacitors to extend the cutoff freguency
coverage .
The output signal is ava; lable after the 4th prototype through a 50-ohm (or, optional l y ,
600-ohm ) resistor. The output o f the buffer ampl ifier i s avai lab l e at Test Poi nt T P - 1 ;
the output of the 1 st pratotype at TP - 2 ; the output of the 2nd prototype at T P - 3;
and the output of the 3rd prototype at T P -4.
Channe l 2 is identical to Channel l . Both channel s are powered from one main
power suppl y, through separate ± 1 5 Y de dual -tracking regulators.
3-4 . 2 n d - ORDER PROTOTYPE
Figure 3 -3 i s a simpl i fied from of the l ow-pass 2nd-order prototype. The high-pass
prototype is identical to the circuit of Figure 3-3 exce pt that the pasition of
resistors R and capacitors C i s i nterchanged . I n both Model s the i nterchange is
effected by the Hi Pass/Lo Pass switch .
The ampl i tude respanse of this circuit i s shown in Fig . 3-4.
