VIPA 013-CCF0R00, Руководство пользователя

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9.6.3.2 Parametrization in SPEED7 Studio
9.6.3.2.1 ‘I/O addresses’
Sub module Input address Access Assignment
DI16/DO12 136 BYTE Digital input I+0.0 ... I+0.7 (X4)
137 BYTE Digital input I+1.0 ... I+1.7 (X4)
9.6.3.2.2 ‘Inputs’
Here you can specify a hardware interrupt for each input for the corresponding edge. The
hardware interrupt is disabled, if nothing is selected (default setting). A diagnostics inter-
rupt is only supported with Hardware interrupt lost .
Here is valid:
n Rising edge: Edge 0-1
n Falling edge: Edge 1-0
n The input delay can be configured per channel in groups of 4.
n An input delay of 0.1ms is only possible with "fast" inputs, which have a max. input
frequency of 100kHz
Ä
‘X4: Connector’ on page 43 . Within a group, the input delay
for slow inputs is limited to 0.5ms.
n Range of values: 0.1ms / 0.5ms / 3ms / 15ms
9.6.4 Digital output
9.6.4.1 Overview
n 12xDC 24V, 0.5A
n Sub module ‘DI16/DO12’
n Ä Chapter 5.5 ‘Digital output’ on page 103
9.6.4.2 Parametrization in SPEED7 Studio
9.6.4.2.1 ‘I/O addresses’
Sub module Output address Access Assignment
DI16/DO12 136 BYTE Digital output Q+0.0 ... Q+0.7 (X5)
137 BYTE Digital output Q+1.0 ... Q+1.3 (X5)
9.6.5 Counter
9.6.5.1 Overview
n 4 channels
n Sub module: ‘Counter’
n
Ä
Chapter 5.6 ‘Counting’ on page 105
‘Trigger for process
interrupt’
Input delay
VIPA System SLIO
Configuration with VIPA SPEED7 Studio
Deployment I/O periphery > Counter
HB300 | CPU | 013-CCF0R00 | en | 17-20 196