Toshiba TXZ, Справочное руководство

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TXZ Family
Flash Memory
2018-06-05
103 / 120
Rev. 2.0
6.6.9. Communication Rules of Flash memory Erasing
This section shows a communication format of flash memory erasing command. Transfer directions in the table are
indicated as follows:
Transfer direction (C

T): From Controller to TXZ
Transfer direction (T

C): From TXZ to Controller
Table 6.15
Communication Rules of Flash memory Erasing
No
Transfer
direction
Transfer data Description
1 C

T Operation command data (0x40)
The controller transmits flash memory erasing command
data (0x40).
2 T

C
ACK response to operation
command
Normal: 0x40
Abnormal: 0x41
Communication error: 0x48
The target checks receive data, and it sends ACK
response data.
If a receive error exists, the target sends ACK response
data “0x48” indicating communication error, and then
returns to the initial state waiting for operation command
data.
If a receive error does not exist, the target checks a
CHECKSUM value according to the operation
commands shown in “Table 6.6 Operation commands
in single boot mode”.
If checking is failed, the target responds ACK response
data “0x41” indicating abnormal state, and then returns
to the initial state waiting for operation command data.
If checking is succeeded, the target sends ACK
response data “0x40” indicating normal state, and waits
for next data.
3 C

T
Erase enable command data
(0x54)
The controller transmits erase enable command data
(0x54).
4 T

C
ACK response to erase enable
command data
- Normal: 0x54
- Abnormal: 0x51
- Communication error: 0x58
The target checks receive data and, it sends ACK
response data.
If receive error exists, the target sends ACK response
data “0x58” indicating abnormal communication, and
then returns to the initial state waiting for operation
command data.
If receive error does not exist, the target checks an
erase enable command (0x54).
If checking is failed, the target responds ACK response
data “0x51” indicating abnormal state, and then returns
to the initial state waiting for operation command data.
If checking is succeeded, the target sends ACK
response data “0x54” indicating normal state, and
performs chip erasing.
5 - - Chip erasing in progress.
6 T

C
ACK response to the checking for
chip erasing
- Erasing completed: 0x4F
- Abnormal end
(blank check error): 0x4C
- Abnormal end
(time-out error): 0x47
The target sends the result of chip erasing process.
If any problems occur, the target sends ACK response
data “0x4F” indicating normal state.
If a blank check error occurs, the target sends ACK
response data “0x4C” indicating abnormal state.
If chip erasing command is aborted, the target sends
ACK response data “0x47” indicating abort and then
returns to the initial state waiting for operation command
data.