TXZ Family
Flash Memory
2018-06-05
36 / 120
Rev. 2.0
11
88 to 95
<BLK11>
00
0
1
0
0
1
0
0x5E102120
12
96 to 103
<BLK12>
00
0
1
0
0
1
1
0x5E102130
13
104 to 111
<BLK13>
00
0
1
0
1
0
0
0x5E102140
14
112 to 119
<BLK14>
00
0
1
0
1
0
1
0x5E102150
15
120 to 127
<BLK15>
00
0
1
0
1
1
0
0x5E102160
Note: Block0 is a generic name for PG0 to PG7.
3.1.1.5. ID-Read Code (IA, ID): Code Flash
ID-Read Command code assignment and the code contents” shows the code assignment and the
contents of ID-Read command.
Table 3.5 ID-Read Command code assignment and the code contents
Code
ID[15:0]
IA[15:14]
Example of address
[31:0]
Manufacture code
0x0098
00
0x5E000000
Device code
0x005A
01
0x5E004000
-
Reserved
10
N/A
Macro code
0x022F
11
0x5E00C000
3.1.1.6.
Memory Swap Bit Assignment (MSA)
“Table 3.6 Setting values assigned to
using Memory Swap command, and example of address”
shows the setting values of
[FCSWPSR]
<SWP[1:0]><SIZE[5:0]> assigned in the 4
th
bus write cycle of the auto
memory swap command.
Table 3.6 Setting values assigned to [FCSWPSR] using Memory Swap command, and example of
address
Register
MSA[11:4]
Example of
address
[31:0]
Adr
[11:9]
Adr
[8]
Adr
[7]
Adr
[6]
Adr
[5]
Adr
[4]
[FCSWPSR]
<SWP[0]>
000
0
0
0
0
0
0x5E003000
<SWP[1]>
000
0
0
0
0
1
0x5E003010
<SIZE[0]>
000
0
0
0
1
0
0x5E003020
<SIZE[1]>
000
0
0
0
1
1
0x5E003030
<SIZE[2]>
000
0
0
1
0
0
0x5E003040
<SIZE[3]>
000
0
0
1
0
1
0x5E003050
<SIZE[4]>
000
0
0
1
1
0
0x5E003060
<SIZE[5]>
000
0
0
1
1
1
0x5E003070