4-11
Themis Computer
4—Universe II Description
Slave Image Programming
4.3.1.2 PCI Bus Fields
The PCI bus fields specifies the mapping of a VMEbus transaction to the appropriate
PCI bus transaction and allows users to translate a VMEbus address to a different
address on the PCI bus. The translation of VMEbus transactions beyond 4 GB
results in a wrap-around to the low portion of the address range.
Figure 4-2.
Address Translation for VMEbus to PCI Bus Transfers
4.3.1.3 Control Fields
A VMEbus slave image is enabled using the EN bit of the control field. The control
field also specifies how reads and writes are processed: either as a coupled transfer
or a posted write. At power up, all images are disabled and configured for coupled
reads and writes.
Table 4-6.
PCI Bus Fields for VMEbus Slave Image
Field
Register Bits
Description
Translation Offset
TO[31:12] or TO[31:16] in
VSIx_TO
Offsets VMEbus slave ad-
dress to a selected PCI ad-
dress
Address space
LAS in VSIx_CTL
Memory, I/O, Configuration
RMW
LLRMW in VSIx_CTL
RMW enable bit
A32 Image
Offset [31..12]
VME [31..12]
VME[11..0]
+
PCI [11..0]
PCI [31..12]
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