4-5
Themis Computer
4—Universe II Description
VMEbus Interface
4.2.4
VMEbus First Slot Detector
As defined by the VME64 specification, the Universe II samples the BG3IN* right
after the reset to determine if the USPII
e
-USB resides in slot 1. If the BG3IN* is
sampled low right after the reset, the USPII
e
-USB board becomes the SYSCON.
Otherwise the SYSCON Module of the Universe II is disabled. The software can set
or clear the SYSCON bit of the MISC_CTL register of the Universe II. The defini-
tion of the MISC_CTL register is provided in
Table 4-1
on page 4-5. The offset of
this register is 0x404.
Table 4-1.
Universe II Miscellaneous Control Register (MISC_CTL)
a
BIts
Name
Description
Reset
State
Access
[31:28]
VBTO
VMEbus Time-out:
0000 = Disable; 0001 = 16
μ
s; 0010 =
32 μ
s; 0011 =
64
μ
s;
0100 = 128
μ
s; 0101 = 256
μ
s; 0110 = 512
μ
s;
0111 = 1024
μ
s; Others = RESERVED
0011
R/W
26
VARB
VMEbus Arbitration Mode: 0 = Round Robin; 1 = Pri-
ority
0
R/W
[25:24]
VARBTO
VMEbus Arbitration Time-out
00 = Disable Timer; 01 = 16
μ
s (minimum value of 8
μ
s, due to the 8
μ
s clock granularity); 10 = 256
μ
s;
others - RESERVED
01
R/W
23
SW_LST
PCI Reset: 0 = no effect; 1 = initiate PCI bus LRST*
0
W
22
SW_SYSRST
Software VMEbus SYSRESET:
0 = no effect; 1 = Initiate VMEbus SYSRST
0
W
20
BI
BI- Mode: 0 = Universe II is not in BI-mode;
1 = Universe II is in BI mode
Power-up
Option
R/W
19
ENGBI
Enable Global BI-mode Initiator:
0 = Assertion of VIRQ1 ignored; 1 = Assertion of
VIRQ1 puts the Universe II in BI-mode
0
R/W
18
RESCIND
Unused on the Universe II
1
R/W
Note:
Footnotes are described at the end of
Table 4-1
on page 4-6.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
