3-1
Themis Computer
3
Hardware Overview
The following sections provide a description of the major components of the
USPII
e
-USB. Detailed explanations of certain subsystems are provided in later
chapters.
3.1
Baseboard
3.1.1
UltraSPARC-II
e
Processor and Cache
The Central Processor Unit (CPU) that is used in the USPII
e
-USB is the Sun Micro-
systems UltraSPARC-II
e
(SME1532C), described in the block diagram of
Figure 3-1
on page 3-2. The CPU is available in operating speeds of 550, 600, or
650 MHz.
The architecture complies with the SPARC V9 instruction set, which enables the system
to use a wide range of peripherals and the high-performance Solaris operating system.
For details on the UltraSPARC-II
e
CPU processor, refer to the Themis
USPIIe Software
Manual
(110102-023), the Sun UltraSPARC-II
e Processor Data Sheet
(SME1701CPGA-400/500), and the Sun
UltraSPARC-IIe User’s Manual
(806-tbd-00]).
Overview
Section
Chapter
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