7 Terminal Configuration and Functions
7.1 Pin Diagram
CC2652PSIP
DIO_28
DIO_25
2
1
DIO_26
DIO_27
DIO_31
DIO_18
DIO_19
DIO_20
DIO_21
DIO_22
DIO_23
DIO_24
VDDS
VDDS
_PU
DIO_4
DIO_1
DIO_2
GND
RF
GND
GND
NC
NC
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
36
37
35
34
33
32
31
30
29
28
27
26
48
47
46
45
44
43
42
41
40
39
38
GND
nRESET
DIO_29
NC
GND
DIO_30
GND
GND
GND
GND
JTAG_TCKC
DIO_17
DIO_16
DIO_15
JTAG_TMSC
DIO_13
DIO_14
DIO_11
DIO_12
DIO_9
DIO_10
DIO_7
DIO_8
DIO_6
DIO_5
49
54
59
64
69
50
55
60
65
70
51
56
61
66
71
52
57
62
67
72
53
58
63
68
73
Figure 7-1. MOT (7-mm × 7-mm) Pinout, 0.5-mm Pitch (Top View)
The following I/O pins marked in
bold
have high-drive capabilities:
• Pin 23, DIO_5
• Pin 24, DIO_6
• Pin 25, DIO_7
• Pin 34, JTAG_TMSC
• Pin 36, DIO_16
• Pin 37, DIO_17
The following I/O pins marked in
italics
have analog capabilities:
• Pin 1, DIO_26
• Pin 2, DIO_27
• Pin 3, DIO_28
• Pin 7, DIO_29
• Pin 8, DIO_30
• Pin 44, DIO_23
• Pin 45, DIO_24
• Pin 48, DIO_25
SWRS263A – FEBRUARY 2021 – REVISED JUNE 2022
Copyright © 2022 Texas Instruments Incorporated
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