R-Engine-D
Chapter 3: Hardware
3-7
To illustrate how to interface the R-Engine-D with external I/O boards, a simple decoding circuit for
interfacing to an 82C55 parallel I/O chip is shown in Figure 3.2.
/WR
/RD
/SEL20
A0
A1
D0-D7
/CS
/WR
/RD
82C55
RST
P00-P07
P10-P17
P20-P27
1
/PCS0
A7
6
VCC
4
3
2
5
A5
A6
/SEL20
/SELF0
/SELC0
/SELA0
/SEL80
/SEL60
/SEL40
14
13
12
11
10
9
7
NC
15
74HC138
C
A
B
G2A
G2B
G1
Y2
Y3
Y4
Y5
Y6
Y7
Y1
Y0
Figure 3.2 Interface the R-Engine-D to external I/O devices
The function
ae_init()
by default initializes the /PCS0 line at base I/O address starting at 0x00. You
can read from the 82C55 with
inportb(0x020)
or write to the 82C55 with
outportb(0x020,dat)
. The call to
inportb(0x020)
will activate /PCS0, as well as putting the address 0x20 over the address bus. The decoder
will select the 82C55 based on address lines A5-7, and the data bus will be used to read the appropriate
data from the off-board component.
Programmable Peripheral Interface (82C55A)
U5 PPI (82C55) is a low-power CMOS programmable parallel interface unit for use in microcomputer
systems. It provides 24 I/O pins that may be individually programmed in two groups of 12 and used in
three major modes of operation.
In MODE 0, the two groups of 12 pins can be programmed in sets of 4 and 8 pins to be inputs or outputs.
In MODE 1, each of the two groups of 12 pins can be programmed to have 8 lines of input or output. Of
the 4 remaining pins, 3 are used for handshaking and interrupt control signals. MODE 2 is a strobed bi-
directional bus configuration.