R-Engine-D
Chapter 3: Hardware
3-3
Note that while the Am186ER supports DMA transfers to and from its asynchronous serial port, the
R1100 does not. Despite this difference, the TERN software drivers for the asynchronous serial port
Timer Control Unit
three 16-bit programmable timers: Timer0, Timer1, and Timer2.
Timer0 and Timer1 are connected to four external pins:
These tw
rnal events, or they can generate non-repetitive or
variable
ef
o prescale timer 0 and timer 1 or be used as a DMA request source.
urth CPU clock cycle. Timer inputs take up to six clock
Timer1 outputs can also be used to generate non-repetitive or variable-duty-cycle
er output takes up to 6 clock cycles to respond to the clock input. Thus the minimum
registers for variable duty cycle output. Using both
support both CPUs.
The timer/counter unit has
Timer0 output = P10 = J2 pin 12
Timer0 input
= P11 = J2 pin 14
Timer1 output = P1
= J2 pin 29
Timer1 input
= P0
= J2 pin 20
o timers can be used to count or time exte
-duty-cycle wav orms.
Timer2 is not connected to any external pin. It can be used as an internal timer for real-time coding or
time-delay applications. It can als
Timer 0 output, P1, is used as the clock input for the AD7852. Timer 0 should therefore not be used
by application unless the AD7852 is not used.
The maximum rate at which each timer can operate is 10 MHz for the Am186ER and 20MHz for the
R1100, since each timer is serviced once every fo
cycles to respond to clock or gate events. See the sample programs
timer0.c
and
ae_cnt0.c
in the
\samples\ae
directory.
PWM outputs
The Timer0 and
waveforms. The tim
timer output cycle is 25 ns x 6 = 150 ns (at 40 MHz).
Each timer has a maximum count register that defines the maximum value the timer will reach. Both
Timer0 and Timer1 have secondary maximum count
the primary and secondary maximum count registers lets the timer alternate between two maximum values.
MAX. COUNT A
MAX. COUNT B
Power-save Mode
deal core module for low power consumption applications. The power-save mode
ces power consumption and heat dissipation, thereby extending battery life in
low.
The R-Engine-D is an i
of the Am186ER redu
portable systems. In power-save mode, operation of the CPU and internal peripherals continues at a slower
clock frequency. When an interrupt occurs, it automatically returns to its normal operating frequency.
The DS1337 on the R-Engine-D has a VOFF signal routed to J1 pin 9. VOFF is controlled by the battery-
backed DS1337. The VOFF signal can be programmed by software to be in tri-state or to be active
