Tektronix TLA715 Series, Руководство по обслуживанию

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Specifications
TLA715 Dual Monitor Portable Mainframe Service Manual
1- 7
Table 1- 3: Backplane interface (Cont.)
Characteristic Description
Active period Outputs signals during valid acquisition periods; resets signals to false state between valid
acquisitions
Output protection Short-circuit protected to ground
1
Smpl represents the time from the event to the next valid data sample at the LA probe tip. In the normal internal clock
mode, this represents the delta time to the next sample clock.
2
DSO modules time correlation measured at the maximum sample rate on one channel only
3
During this measurement the DSO is measuring the CLK channel of the LA module. If the DSO measures a data
channel from the time the data edge occurs until the clock edge occurs, the time must be included
4
The input bandwidth specifications apply only to signals to the modules from the External Signal Input connector, not
to round-trip signals into the External Signal Input connector and back out of the External Signal Output connector.
5
The output bandwidth specifications apply only to signals from the modules to the External Signal Output connector,
not to round-trip signals into the External Signal Input connector and back out of the External Signal Output connector.
Table 1- 4: Latencies
Characteristic Description
System Trigger and External Signal Input latencies (typical)
LA source characteristics
External System Trigger Input to
LA probe tip
1
--266 ns
External Signal In to LA probe tip
via Signal 3, 4 (TTLTRG0, 1)
2
--212 ns + Clk
External Signal In to LA probe tip
via Signal 1, 2 (ECLTRG0,1)
2, 3
--208 ns + Clk
DSO source characteristics
4
External System Trigger Input to
DSO probe tip
1
--25 ns
System Trigger and External Signal Output latencies (typical)
LA source characteristics
5
LA probe tip to External System
Trigger Out 376 ns + Smpl
LA probe tip to External Signal Out
via Signal 3, 4 (TTLTRG0, 1)
6
OR function
AND function 366 ns + Smpl
379 ns + Smpl