Appendix C: Status model
Models 707B and 708B Switching Matrix Reference Manual
C-16
707B-901-01 Rev. B / January 2015
Status byte and service request (SRQ)
Service requests (SRQs) allow an instrument to indicate that it needs attention or that some event
has occurred. When the controller receives an SRQ, it allows the controller to interrupt tasks to
perform other tasks in order to address the request for service.
For example, you might program your instrument to send an SRQ when:
•
All instrument operations are complete
•
An instrument error occurs
•
A specific operation has occurred
Two 8-bit registers control service requests, the Status Byte Register and the Service Request
Enable Register. The
(on page C-16) topic describes the structure of these
registers.
Service requests affect GPIB, USB, and VXI-11 connections. On a GPIB connection, the SRQ line is
asserted. On a VXI-11 or USB connection, an SRQ event is generated.
Service Request Enable Register
The Service Request Enable Register controls the generation of a service request. This register is
programmed by the user and is used to enable or disable the setting of bit B6 (RQS/MSS) by the
Status Summary Message bits (B0, B1, B2, B3, B4, B5, and B7) of the Status Byte Register. As
shown in the
(on page C-16) topic, a logical AND
operation is performed on the
summary bits (&) with the corresponding enable bits of the Service Request Enable Register. When a
logical AND
operation is performed with a set summary bit (1) and with an enabled bit (1) of the
enable register, the logic “1” output is applied to the input of the logical OR gate and, therefore, sets
the MSS/RQS bit in the Status Byte Register.
The individual bits of the Service Request Enable Register can be set or cleared by using the
*SRE
common command or
status.request_enable
. To read the Service Request Enable Register,
use the
*SRE?
query or
print(status.request_enable)
. The Service Request Enable Register
clears when power is cycled or a parameter value of 0 is sent with a status request enable command
(for example, a
*SRE 0
or
status.request_enable = 0
is sent). The commands to program and
read the SRQ Enable Register are listed in
Status byte and service request commands
Status Byte Register
The summary messages from the status registers and queues are used to set or clear the appropriate
bits (B0, B1, B2, B3, B4, B5, and B7) of the Status Byte Register. These summary bits do not latch,
and their states (0 or 1) are dependent upon the summary messages (0 or 1). For example, if the
Standard Event Register is read, its register will clear. As a result, its summary message will reset to
0, which will then reset the ESB bit in the Status Byte Register.
The Status Byte Register also receives summary bits from itself, which sets the Master Summary
Status, or MSS, bit.
