Circuit
Description
—Type 3B5
to
run
up at
this
sweep rate.
The
Advance
Pulse Generator
is
not
turned
on
by
the
trigger
pulse
which
starts
the
sweep,
due
to
normal
delay time
designed
into
this
circuit.
However,
if
the
next trigger
pulse
is
applied
to
Q665
before
the
saw
tooth
turns
the
Window
Gate circuit
on
(i.e.,
collector
of
Q664
still
negative), the
Advance
Pulse
Generator,
Q665
and
Q675,
is
turned
on.
When Q665
turns
on,
its
collector
rises
positive
to
bias
Q675
on.
The
resulting
negative-going
change
at
the
collector
of
Q675
holds Q665 in
conduction
through
C671-R671 until
the
charge
on
C671
equalizes.
When
C671
is
charged,
the
base
of Q665
rises
positive
and
it
turns
off.
The
signal
at
the
collector
of
Q665
provides
the
advance
pulse
to
the
Advance
Pulse
Output
stage.
It
also
provides
a
sweep reset
pulse
to
the
Sweep Generator
circuit
through
C681-D681
so
the
sweep
restarts
with
each
advance
pulse. Each
time
a
trigger
signal
produces
an
advance
pulse
during
the
window-gate
signal
(before the
sawtooth
biases
Q653
on),
the
sawtoooth starts
to
run
up
again
at
the
next
faster
sweep
rate
(advance pulse
increases
sweep rate; see Counter
Circuit
discussion).
This
action
con
tinues
each time Q665
is
triggered
until
the
sweep
rate
is
fast
enough
to
turn
Q653
on
(to
end
window-gate
signal)
before
a
trigger
can
produce
an
advance
pulse.
The
amount
that
the
sawtooth
must
run
up
before
it
turns
Q653
on is
set
by
the
CYCLES/SWEEP
adjustment.
Since
voltage
level
on
the
sawtooth
is
related
to
divisions
on
the
CRT,
the
setting
of
this
control
determines
the
number
of
cycles
in
the
CRT
display.
For
example,
assume
a
constant
input
signal
produces
a three-cycle
display
in
the
Seek
Mode
when
R650
is
set to midrange.
Then,
when
R650 is set
clock
wise,
the
base
of
Q653
is
less
negative
and
the
sawtooth
must
overcome
less
of
the
sweep
gate
current
to
turn
Q653
on.
Therefore, fewer
advance
pulses
are
produced
before
the
sweep
rate
is
advanced
enough
so
that
Q653
turns
on
before
Q655
can
be
triggered.
With
fewer
advance
pulses
to
the
Counter
Circuit, a
slower
sweep
rate
is
produced
to
display
more
cycles
of
the
signal.
On
the
other
hand,
if the
CYCLES/SWEEP
adjustment
is
set
counterclockwise,
the
saw
tooth must
overcome
more
sweep-gate
current
and
run
up
farther
to turn
Q653
on. More
advance
pulses
are
produced
before
the
sawtooth
reaches
the
level
where
it
turns
Q653
on
before
Q665
can
be triggered.
More
advance
pulses
to
the
Counter
Circuit
produce
a
faster
sweeo
rate
which
results in
less
cycles
in
the
display.
Advance
Pulse
Output
Q684
provides
amplification
for
the
advance
pulses
pro
duced
by
the
Advance
Pulse
Generator stage
and
couples
them
to
the
Counter
Circuit.
This
stage
only
produces
an
output when enabled by
the
Advance
Gate
stage
through
D682.
Locking
this
stage
out
in
addition
to
locking
out
the
Advance
Pulse
Generator circuit
insures that
all
advance
pulses
are
locked
out
after
the
0.1
microsecond
sweep
rate
has
been
reached.
It
also
prevents
the
Counter
Circuit
from
being
advanced
by
noise
or
other
extraneous pulses in
the
Seek
Circuit
when
a
seek
command
is
not
present.
Fig.
3-23
shows
operating
waveforms from
the
Seek
Circuit.
The
first
set
of
waveforms
shows circuit conditions
with
a
1-kHz sine
wave
applied
(CYCLES/SWEEP
adjustment
set
according
to
Calibration
Procedure).
The
second
set
of
wave
forms
shows
circuit
conditions
with
a
1.3 kHz sine-wave
signal.
Counter
Circuit
General
The
Counter Circuit
produces
the
multiplier
and
decade
logic
levels
for
the
Seek
and
External
modes
of
operation.
In
the
Seek
Mode,
the output
of
this
circuit
is
controlled
by
the
seek
mono pulse
and
advance
pulses
produced
by
the
Seek
Circuit.
For
external
Mode
operation,
the
output
of
this
circuit is controlled
by
external
program
logic
levels
applied
through
the
front-panel PROGRAM
connector.
Fig.
3-24
shows a
logic block
diagram
of
the
Counter
Circuit.
A
diagram
of
this
circuit
is
shown
on
diagram
7
at
the
rear
of
this
manual.
Multiplier
Counter
The
three-state
Multiplier
Counter
produces
the
1-2-5
logic
to
select
the
sweep-rate
multiplier
within
the
timing
decade
selected
by
the
Decade
Counter
stage.
Fig.
3-25
shows
circuit
conditions
for
"5
”
output.
The
positive-going
seek mono
pulse from
the
Seek
Circuit
turns
on
Q705
at
the
start
of
each
seek
cycle
through
C731,
D731
and
R731.
The
collector level
of
Q705
is
coupled
to
Q715
and
Q725
through
D713
and
D723
to
hold them
off. The
first
advance
pulse
produced
by
the
Seek
Circuit
is coupled
to
the
base
of
Q705
through
C704
and D704. Q705
turns
off
and
its
col
lector
rises
positive.
This
level
change turns
Q715
on
through
C709.
Fig.
3-26
shows
circuit
conditions
for
"2" multiplier
output
Q715
turns
on
when
Q705
is
turned
off
by
the
advance
pulse.
Then,
the
collector
level
of
Q715
holds Q705
and
Q725
off
through
D703
and D723.
The
second
advance
pulse pro
duced
by
the
Seek
Circuit
is
coupled
to
the
base
of
Q715
through
C714
and
D714.
This
negative-going
pulse turns
Q715
off
and
its
collector
rises
positive.
C719
couples
this
change
to
the
base
of
Q725
to
turn
it
on.
"1" multiplier
logic is
produced
by
Q725
as
shown
in
Fig.
3-27.
Q725
is turned
on
by
Q715.
As
it
turns
on,
the
collector
level
of
Q725
goes
negative
to
hold
Q705
and
Q715
off
through
D702
and D712.
The
third
advance
pulse
produced
by
the
Seek
Circuit
is
connected
to
the
base
of
Q725
through
C724
and
D724.
Q725
turns
off
and
its
col
lector
rises
positive.
This
positive
level
change
turns
Q705
back
on
through
C729.
As
Q705
comes
back
on,
the
nega
tive-going
change
at
its
collector
produces an
advance
com
mand
level
to
the
Enable
Multivibrator
stage.
The
action
described
starts
over
and
repeats
until
the
Seek Circuit stops
producing
advance
pulses.
One
advance
command
to
the
Enable
Multivibrator
is produced
for each
three advance
pulses
produced
by
the
Seek
Circuit.
For
External
Mode
operation
grounding
(zero-volt)
external
multiplier
program
logic
is applied
to
the
Multiplier
Counter
circuit
through either
terminal
2,
3
or
5
of
J30.
This external
program
logic
biases
on the
associated
transistor
to
produce
the
desired
multiplier
logic output.
The
transistor
which
is
turned
on
by
the
external
program
logic
holds
the
other
transistors
off
and
this
transistor
remains
on
until
the
external
program
logic
is removed.
For
Manual
Mode
operation,
—
12.2-volt
Seek/External
Power
to
the
Counter
Circuit
is
disconnected.
This
enables
the
entire
circuit
in
this
mode and the
output
levels
of
this
circuit
rise
to
about
zero
volts.
3-37
Содержание 3B5
Страница 4: ...Fig 1 1 Type 3B5 Automatic Programmable Time Base unit Type 3B5...
Страница 15: ...Operating Instructions Type 3B5 TYPE 3B5 CONTROL SET UP CHART Fig 2 2 Control set up chart 2 7...
Страница 48: ...CO I o Fig 3 13 Delay and Timing Circuit logic block diagram Circuit Description Type 3B5...
Страница 61: ...GO i GO GO Fig 3 22 Seek Ciicuit Logic block diagram Circuit Description Type 3B5...
Страница 70: ...u k KJ Fig 3 29 Circuit conditions for Manual Mode operation Circuit Description Type 3B5...
Страница 71: ...w K w Fig 3 30 Circuit conditions for Seek Mode operation Circuit Description Type 3B5...
Страница 72: ...w I u U Fig 3 31 Circuit condition for External Mode operation Circuit Description Type 3B5...
Страница 88: ...Maintenance Type 3B5 Fig 4 9 Location of components on Logic Card 4 14...
Страница 89: ...u Oi Fig 4 10 Location of components on Counter Card Maintenance Type 3B5...
Страница 92: ...NOTES I...
Страница 104: ...NOTES...
Страница 106: ...Calibration Type 3B5 Fig 6 1 Recommended calibration equipment...
Страница 160: ......
Страница 176: ...J400 RtADOUT BOARD 3B5 PLUG IN A READOUT...
Страница 182: ...397 R E A D O U T B O A R D 10 6b READOUT BOARD...
Страница 184: ...FIG 1 FRONT SWITCHES TYPE 3B5 AUTOMATIC PROGRAMMABLE TIME BASE...
Страница 185: ...FIG 2 CHASSIS REAR 3 GS to TYPE 3B5 AUTOMATIC PROGRAMMABLE TIME BASE...
Страница 186: ...OPTIONAL ACCESSORIES...