Circuit
Description
—
Type
3B5
trigger
signal
at
this
point
is
basically
a
rectangular
pulse
with
a
fast
rise
and
fall.
The
width
of
this
pulse depends
upon
the input
signal
waveshape
and
the
LEVEL
control
setting.
QI
34
is connected
as
an
amplifier
with
the primary
of
T140
providing
the
only
collector
load.
Since
transformers
respond
only
to
a
changing
current,
the
signal
at
the
secon
dary
of
T140
consists of
negative-going
pulses approximately
10
nanoseconds wide,
which
are
coincident
with
the fall
of
the
positive-going
signal at
the
base
of
Q134
(inverted
by
transformer).
The
secondary
of
T140
is
prevented
from
going
negative
by
D1
42.
Therefore,
only
the
positive-going
trigger
pulses are applied
to
the
Sweep
Generator.
The
negative-going
trigger
pulses
at
the
collector of
Q134 are
also
coupled to the
Bright
Baseline
circuit
through
D281.
Seek
Circuit
Driver
The
trigger
signal
at
the
output
of
the
Trigger Shaper
stage is
also
connected
to
the
base
of
Q1
24
through
R119.
The
output
signal
at
the
collector
of
Q1
24
is
connected
to
the
Seek
Circuit
through
terminal 14
of
J400.
Trigger
Level
Amplifier
The
Trigger
Level
Amplifier,
Q
1
4,
establishes
the
bias
level
at
the
base
of
the
Input
Emitter
Follower,
Q23.
The
level
on
the
input
signal at
which
the
trigger
circuit
responds
is
determined
by changing this bias
level.
The
base
level
of
Q1
4
is
set
at about
—
6
volts by
divider
R13-R14
between
—12.2
volts
and ground.
This
sets
the level at
the
emitter
of
Q
1
4
near —
6
volts
also.
The
quiescent
current
through
Q1
4
is
adjusted by
the
TRIG
LEVEL
CENTERING
adjustment,
R1
5,
to
provide
a
zero-volt level
at
the
base
of
Q23
when
the
LEVEL
control is
centered.
The
source
of
the
control
current which
determines
the
triggering
level
is
selected
by
the
Trigger
Mode
Logic
stage.
Level
current
may
come
from
the
manual
LEVEL
control,
R25A,
through
D
10, the
Auto
Trigger
P-P
Level
stage
through
D39 or external
program
trigger
level
through
D42.
The
Trigger
Mode
Logic
stage
allows
current
from
only
one of these
sources to
pass
to
the
emitter
of Q14
(see
Trigger
Logic
discussion).
Auto
Trigger
P-P
Level
The
trigger
level for
auto
triggering
is
established by
the
Auto
Trigger
P-P
Level
stage,
Q33 and Q34.
The
output
level from
this
stage
is
determined by
R25B
at
the
base
of
Q33.
.
The
network
D23-D24-D26-C23-C26
around
R25B
com
prises
a
peak-level sensing
network which allows
R25B
to
be
adjusted between
two
voltage
levels
representing
the
most
negative
and
positive
peaks
of
the
trigger
signal.
This
provides
trigger
level
adjustment
for
the
auto
trigger
mode
over
at
least
a
10%
to
90%
range
of
the
trigger signal
transistion.
It
also
allows
the
unit
to
be
triggered
at
all
positions
of
the
LEVEL
control
if
the minimum frequency
and
amplitude
specifications
are
met. This
is
accomplished as
follows:
when
the trigger
signal at
the
emitter
of
Q23
rises
positive,
D23
is
forward
biased
and
C23
charges toward
this
positive
level.
When
the signal
goes
negative,
D23
is
reverse
biased
and D26 is
forward
biased
through
D24.
C26
charges
toward
the
level
of
the
negative
peak. After
several
cycles,
C23
is
charged
to
the
level
of
the
positive
peaks
and
C26
to
the
level
of
the
negative
peaks.
This
effectively
places
the peak-to-peak
voltage
of
the
input
signal
across
R25B
at
all
times.
Due
to
some
losses
in
the
circuit,
this
voltage
will
be
slightly
lower
than
the
total
this
positive
level.
When
the
signal
goes
negative,
D23
is
peak-to-peak
voltage which
results
in
a range
of
at least
10%
to
90%
of
the
trigger
signal
transition.
Therefore,
in
the
auto
trigger
mode,
the
trigger
level
can
not
be
set
to
a
point
which does
not
allow
the
unit
to
trigger.
The
level
selected
by
R25B is
connected
to
the
base
of
Q33.
Q33
and
Q34
are
connected
to
operate with
very
low
input
current.
C31,
connected
from
the
collector
of
Q34
to
the
base
of
Q33,
slows
down
the
action
of
the
circuit
and
keeps
it
from
changing
the
output
level
too
quickly
due
to
a
transient
change
in
trigger
signal
amplitude.
The
output
level
at
the
collector
of
Q34
is
connected
to
the
Trigger
Level
Amplifier
stage
through
D39
as
selected
by
the
Trigger
Mode
Logic
stage.
Trigger
Latch
Circuit
The
Trigger
Latch Circuit is
comprised
of
Q54
in
the
Sweep
Trigger
circuit
and
Q634 in
the
Seek
Circuit.
A
simplified diagram of
this
circuit
is
shown in Fig.
3-8.
Only
the
components
essential
to
this
explanation
are
shown
on
this
diagram.
Note
that
the
collector
of
Q634
is
connected
to
the
base
of Q54 and
the
collector
of
Q54
is
connected
to
the
base
of Q634. Connected
in
this
manner,
Q54
and
Q634
comprise
a
latch circuit.
When
either
transistor is
on,
they
are
both
on
and
when
either transistor is
off,
they
are
both
off.
The
output
levels from
this
stage
control
the
Trigger
Mode
Logic
stage
and
the trigger-level diodes
through
D9
and
D52.
The
following
description
explains
the
condition
of
this
stage
in each
mode of
operation.
More
information
on
the
operation
of
this
circuit
is
given
under
Trigger
Mode
Logic.
Manual
Mode.
In
the Manual Mode
of
operation,
—
12.2
volts
Manual
Power
(see Operating
Mode
Power
discussion)
is
applied
to
the
base
of
Q54
through
D54 and
R54.
This
negative voltage
forward
biases
Q54
and
its
collector
goes
positive
to
about
zero
volts.
This
in
turn
forward
biases
Q634
to
"latch
up"
the circuit.
(Since
Q54
is
held
on
through
D54,
the
unit
may
be
operated
without
the
Logic
Card
for
Manual
Mode
only
operation.)
The positive
collector
level
of
Q54
also
forward
biases
D52
to
allow the
Trigger
Func
tion
switch
(or external program)
to
determine
trigger
cou
pling,
source
and
mode
(note
exception
for auto triggering)
and
reverse
biases
D9
to
allow
manual
level current
to
pass
through
D10. For auto
triggering
in
the
Manual
Mode
of
operation,
the
base
of
Q54
is
connected
to
ground
by
SW50
and
the
Trigger
Latch
Circuit
turns
off.
When
the Trigger
Latch
Circuit
turns
off,
D9
disconnects
the
manual
level
control
current
and
D52
is
reverse
biased
to
disconnect
the
Trigger
Function
switch.
Now
the
Auto
Trigger
P-P Level
stage
determines
the
trigger
level
(see Trigger
Mode
Logic
discussion
for
more
information).
Seek
Mode.
In
the
Seek
Mode,
operation
of
the
Trigger
Latch
Circuit
is
determined
by
a
voltage
level from
the
Bright
Baseline
stage (see
Bright
Baseline
discussion)
which
is
connected
to
the
base
of Q54
through
D299.
When
a
seek
command
is
received,
the
seek
mono
pulse
produced
by
Q625
(see
Seek
Circuit
discussion)
momentarily
forward
biases
Q634
through
D632-C632.
If
the
unit
is
correctly
triggered,
the
voltage
level from
the
Bright
Baseline
stage
is
negative
enough
to
reverse
bias
D299.
This
allows Q54
to
conduct
and
the
Trigger
Latch
Circuit remains
on.
When
3-11
Содержание 3B5
Страница 4: ...Fig 1 1 Type 3B5 Automatic Programmable Time Base unit Type 3B5...
Страница 15: ...Operating Instructions Type 3B5 TYPE 3B5 CONTROL SET UP CHART Fig 2 2 Control set up chart 2 7...
Страница 48: ...CO I o Fig 3 13 Delay and Timing Circuit logic block diagram Circuit Description Type 3B5...
Страница 61: ...GO i GO GO Fig 3 22 Seek Ciicuit Logic block diagram Circuit Description Type 3B5...
Страница 70: ...u k KJ Fig 3 29 Circuit conditions for Manual Mode operation Circuit Description Type 3B5...
Страница 71: ...w K w Fig 3 30 Circuit conditions for Seek Mode operation Circuit Description Type 3B5...
Страница 72: ...w I u U Fig 3 31 Circuit condition for External Mode operation Circuit Description Type 3B5...
Страница 88: ...Maintenance Type 3B5 Fig 4 9 Location of components on Logic Card 4 14...
Страница 89: ...u Oi Fig 4 10 Location of components on Counter Card Maintenance Type 3B5...
Страница 92: ...NOTES I...
Страница 104: ...NOTES...
Страница 106: ...Calibration Type 3B5 Fig 6 1 Recommended calibration equipment...
Страница 160: ......
Страница 176: ...J400 RtADOUT BOARD 3B5 PLUG IN A READOUT...
Страница 182: ...397 R E A D O U T B O A R D 10 6b READOUT BOARD...
Страница 184: ...FIG 1 FRONT SWITCHES TYPE 3B5 AUTOMATIC PROGRAMMABLE TIME BASE...
Страница 185: ...FIG 2 CHASSIS REAR 3 GS to TYPE 3B5 AUTOMATIC PROGRAMMABLE TIME BASE...
Страница 186: ...OPTIONAL ACCESSORIES...
