Tektronix 3B5, Инструкция по эксплуатации

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Circuit Description — Type 3B5
tion desired and zero volts for the other two lines. These
logic levels are connected through the diode matrix to
control the readout driver transistors, Q423-Q443-Q453-
Q473. These transistors in turn control the (Q423), "0"
(Q443), "m" (Q453) and " μ " (Q473) readouts on the front
panel.
Figs. 3-19, 3-20 and 3-21 show current flow and diode
conditions in the diode matrix and driver transistors to illus­
trate the operation of this circuit. For convenience in explain­
ing this circuit, only part of the diagram is reproduced in
these figures. Also, conditions are explained with only one
basic sweep decade (one millisecond decade) with the
changes in circuit conditions shown for X 1 , X10 and X 1 00
delayed sweep magnification of this basic sweep rate.
Condition of components not essential to this explanation is
omitted.
Fig. 3-19 shows circuit conditions for X1 sweep magnifi­
cation at sweep rates of 1, 2 and 5 milliseconds/division.
The 1 ms (d) decade logic line is at —12 volts and the remain­
ing decade logic lines are at zero volts. The X1 logic line
is at about — 7 volts and the X10 and X 1 00 magnifier
logic lines are at zero volts. The decade logic level to the
readout driver, Q423, is shunted by the zero volt X10
magnifier logic at the anode of D421. D422 is reverse biased
and the readout remains off. The decade logic level
connected to the "0” readout driver, Q443, is shunted by the
zero-volt X 1 00 magnifier logic at the anode of D431. D432
is reverse biased and the '0" readout remains off. The
decade logic level connected to the base circuit of the "p"
readout driver, Q473, is shunted by the zero-volt XI 00
magnifier logic at the anode of D471 and the " μ " readout
remains off. The decade logic is also connected to the base
circuit of the "m” readout driver through both R463 and
R466. The current through R463 is shunted by the X10
magnifier logic through D463. However, the decade logic
is applied to the base of Q453 through D467 because the
— 7 volts X1 magnifier logic reverse biases shunt diode
D466. The base of Q453 drops to about — 6 volts and it
is forward biased. Current passes through B997 and the
"m" readout comes on. This logic combination provides a
readout of _____ ms/DIV, with the multiplier provided by
the Multiplier Readout stage.
Circuit conditions for X10 delayed sweep magnification
of the same basic sweep rate described above are shown
in Fig. 3-20. The 1 ms decade logic is still — 12 volts. How ­
ever, the X10 magnifier logic line is at — 12 volts and the
X 1 and X 1 00 lines are at zero volts. The decade logic
applied to the base circuit of the readout driver is
allowed to pass to the base of Q423 because the shunt
diode D421 is held reverse biased by the — 12-volt X10
magnifier logic level. Current passes through B991 and the
readout comes on. The decade logic to the "0" read­
out driver, Q443, is shunted by D431. Decade logic to the
"m” readout driver, Q453, biases this transistor on since the
shunt diode D463 is reverse biased by the — 12-volt X10
magnifier logic level. Current through the parallel path to
Q453 is shunted through D466 to the X1 magnifier logic
line. The “ μ " readout driver, Q473, remains off because
the decade logic current is shunted by D471. This logic
combination provides a readout of_____ ms/DIV, with the
multiplier provided by the Multiplier Readout stage.
X100 delayed sweep magnification of the basic 1, 2 or
5 millisecond sweep rate is shown in Fig. 3-21. Decade logic
to the 1 ms logic line remains at — 12 volts. Magnifier logic
to the X 1 00 magnifier logic line is now —12 volts and
zero volts to the X1 and X10 lines. Decade logic to the
base of Q423 is shunted to the X10 magnifier logic line by
D421. The — 12 volt level on the anode of D431 holds it
reverse biased and allows the decade logic level to turn
Q443 on. Current flows through B995 and the "0 ” readout
comes on. Decade logic to the “m" readout driver is shunted
because the XI magnifier logic level forward biases D466
and the X10 magnifier logic level forward biases D463.
D471 is held reverse biased by the — 12-volt X 1 00 magnifier
logic and the decade logic biases Q473 on. Current flows
through B998 and the " μ " readout comes on. This logic
combination provides a readout of_____ 0 μ s/DIV, with the
multiplier provided by the Multiplier Readout stage.
"1" multiplier and 0.1 ps decade (h) logic levels are con ­
nected to the Seek Circuit to lock out the Seek circuit when
the 0.1 microsecond sweep rate is reached (see Advance
Gate discussion). In the Seek Mode of operation, the 0.1
microsecond position is the only sweep rate when both of
these logic levels are —12 volts.
External 10 Nanosecond Driver
To select the 10 ns decade (i) for External Mode operation,
zero-volts external program logic is applied to terminal 26
of J30. The base of Q404 rises positive enough to bias it
on and its collector goes negative to about — 12 volts.
This places —12 volts on the 10 ns decade logic line and
the "0", “m”, “ μ " readouts are turned on through diodes
D485, D486 and D487. D403 couples the 10 ns external
program logic to pin 24 of J700 to turn on the 0.1 ps timing
decade (h) to provide the correct sweep rate. The 10 ns
logic level is also connected to the Horizontal Amplifier
circuit.
In addition to turning on Q404 and the 0.1 ps timing
decade, the 10 ns external program logic at terminal 26
of J30 locks out the readout driver, Q423, through D447
and the “ μ " readout driver, Q473, through D470 to prevent
parallel currents to the readout bulbs.
Seek Circuit
General
The Seek Circuit initiates the automatic time-base and
trigger seeking functions of the Type 3B5 upon receipt of a
seek command. This circuit provides reset and advance
pulses to the Counter Circuit to automatically select sweep
rate and, in conjunction with the Trigger Circuit, select auto
triggering if the front-panel Trigger controls are incorrectly
set or a trigger signal is not applied. Fig. 3-22 shows a
logic block diagram of the Seek Circuit. A diagram of this
circuit is shown on diagram 6 at the rear of this manual.
Fig. 3-23 shows operating waveforms from the Seek Circuit
to aid in this explanation.
Seek Input Circuit
The seek command to actuate this circuit can come from
one of three sources: 1) front-panel SEEK button, SW604;
2) remote seek through terminal 12 of the front-panel PROG­
GRAM connector, J30; 3) remote seek through the amplifier
unit from a remote-seeking probe or the amplifier unit pro­
gram connector. The remote seek command from the amplifier
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