Teknor Industrial Computers TEK-CPCI 1003, Техническое справочное руководство

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CPCI I/O Signals
11-5
11.2.5 EIDE 1 Interface
Signal Pin Assignation (J4) Description
/BRSTDRV A17
SDD 0-15 B20, E19, C19, A19,
D18, B18, E17, C17,
D17, A18, C18, E18,
B19, D19, A20, C20 Sec. Disk Data – These signals are used to transfer
data to or from the IDE device.
SDREQ A21 Sec. Disk DMA Request - This signal is directly driven
from the IDE device DMARQ signal. It is asserted by the
IDE device to request a data transfer.
/SDIOW C21 Sec. Disk I/O Write – In normal IDE mode, this is the
command to the IDE device that it may latch data from
SDD lines.
/SDIOR E21 Sec. Disk I/O Read – In normal IDE mode, this is the
command to the IDE device that it may drive data on
SDD lines.
SIORDY B22 Sec. I/O Channel Ready – In normal mode, this input
signal is driven directly by the corresponding IDE device
IORDY signal.
/SDDACK D22 Sec. DMA Acknowledge – This signal directly drives the
IDE device /DMACK signal. It is asserted to indicate to
IDE DMA slave devices that a given data transfer cycle
is a DMA data transfer cycle.
IRQ15 E22
/IOCS16 A23
SDA 0-2 D23, B23, E23 Sec. Disk Address – These signals indicates which byte
in either the ATA command block or control block is
being addressed.
/SCS1, /SCS3 A24, B24 Secondary Chip Select - For ATA control register.
SEC-PD1 C24
/FAL1 E24
Enhanced IDE 1 (EIDE 1) is assigned to the Secondary EIDE logical interface. It supports
directly two IDE devices configured as Master and Slave devices.