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Onboard Features
7-3
7.2 ENHANCED IDE INTERFACES
The board features two Enhanced IDE interfaces dedicated to Primary and Secondary EIDE
logical interfaces. Each support up to two IDE devices (including CD-ROMs, hard disks,
plus CompactFlash on the secondary IDE interface) with independent timings, in
Master/Slave combination.
SIGNAL PATHS
The primary EIDE interface is available through both the J5 CPCI I/O connector and
the J19 Mezzanine connector.
Secondary EIDE interface is only available through the J4 CPCI I/O connector.
The IDE interfaces supports PIO IDE transfers up to 14MB/sec and Bus Master IDE
transfer up to 33MB/sec (Ultra-DMA 33). It does not consume any ISA DMA resources
and integrates 16x32-bit buffers for optimal transfers.
CAUTION
When connecting IDE devices to the Primary IDE interface (IDE0),
Master and Slave devices must be shared in respect of the device
allocation on both the CPCI I/O connector and the mezzanine
Two Master devices (or two Slave devices) must not be installed on the
same interface at the same time.
Содержание TEK-CPCI 1003
Страница 15: ...TEK CPCI 1003 Technical Reference Manual 5 4 5 1 CONNECTOR LOCATION...
Страница 22: ...FEATURE DESCRIPTION 7 ONBOARD FEATURES...
Страница 51: ...TEK CPCI 1003 Technical Reference Manual 9 2 JUMPER LOCATION...
Страница 52: ...Setting Jumpers 9 3 JUMPER SETTINGS Table 1...
Страница 53: ...TEK CPCI 1003 Technical Reference Manual 9 4 JUMPER SETTINGS TABLE 2...
Страница 67: ...SOFTWARE SETUPS 12 AWARD SETUP PROGRAM 13 UPDATING THE BIOS WITH UPGBIOS 14 VT100 MODE...
Страница 95: ...C 1 C BOARD DIAGRAMS C 1 ASSEMBLY TOP DIAGRAM...