Technosoft 2016
41
iPOS4808 MY-CAN-STO/-CAT-STO Technical Reference
3.9.9
Digital Outputs (OUT0, OUT1, OUT2/Error, OUT3/ Ready, OUT4)
Min.
Typ.
Max.
Units
Mode compliance
All outputs (OUT0, OUT1, OUT2/Error, OUT3/Ready)
NPN 24V
Default state
Not supplied (+V
LOG
floating or to GND)
High-Z (floating)
Immediately after
power-up
OUT0, OUT1,OUT4
Logic “HIGH”
OUT2/Error, OUT3/ Ready
Logic “LOW”
Normal operation
OUT0, OUT1, OUT2/Error, OUT4
Logic “HIGH”
OUT3/Ready
Logic “LOW”
Output voltage
Logic “LOW”; output at nominal current
0.8
V
Logic “HIGH”;
output current = 0,
no load
OUT2/Error, OUT3/ Ready
2.9
3
3.3
OUT0, OUT1, OUT4
4
4.5
5
Logic “HIGH”, external load to +V
LOG
V
LOG
Absolute maximum, continuous
-0.5
V
LOG
+0.5
Absolute maximum, surge (duration
≤
1s)
†
-1
V
LOG
+1
Output current
Logic “LOW”, sink current, continuous OUT0, OUT1, OUT2,
OUT3, OUT4
0.5
A
Logic
“LOW”, sink current, pulse ≤ 5 sec. OUT0, OUT1,
OUT2, OUT3, OUT4
1
A
Logic “HIGH”, source current;
external load to GND; V
OUT
>= 2.0V
OUT2/Error, OUT3/
Ready
2
mA
OUT0, OUT1
4
mA
Logic “HIGH”, leakage current; external load to +V
LOG
; V
OUT
=
V
LOG
max = 40V
0.1
0.2
mA
Minimum pulse width
2
µs
ESD protection
Human body model
±15
kV
3.9.10 Digital Hall Inputs (Hall1, Hall2, Hall3)
Min.
Typ.
Max.
Units
Mode compliance
TTL / CMOS / Open-collector
Default state
Input floating (wiring disconnected)
Logic HIGH
Input voltage
Logic “LOW”
0
0.8
V
Logic “HIGH”
2
5
Floating voltage (not connected)
4.4
Absolute maximum, surge (duration
≤
1s)
†
-10
+15
Input current
Logic “LOW”; Pull to GND
1.2
mA
Logic “HIGH”; Internal 1K
Ω
pull-up to +5
0
0
0
Minimum pulse width
2
µs
ESD protection
Human body model
±5
kV
3.9.11 Encoder #1 Inputs (A1+, A1-, B1+, B1-, Z1+, Z1-,)1
Min.
Typ.
Max.
Units
Single-ended mode compliance
Leave negative inputs disconnected
TTL / CMOS / Open-collector
Input voltage, single-ended mode A/A+,
B/B+
Logic “LOW”
1.6
V
Logic “HIGH”
1.8
Floating voltage (not connected)
3.3
Input voltage, single-ended mode Z/Z+
Logic “LOW”
1.2
V
Logic “HIGH”
1.4
Floating voltage (not connected)
4.7
Input current, single-ended mode A/A+,
B/B+, Z/Z+
Logic “LOW”; Pull to GND
5.5
6
mA
Logic “HIGH”; Internal 2.2K
Ω
pull-up to +5
0
0
0
Differential mode compliance
For full RS422 compliance, see
TIA/EIA-422-A
Input voltage, differential mode
Hysteresis
±0.06
±0.1
±0.2
V
Differential mode
-14
+14
Common-mode range (A+ to GND, etc.)
-11
+14
Input impedance, differential
A1+, A2+, B1+, B2+, Z1+, Z2+
2.2
kΩ
A1-, A2-, B1-, B2-, Z1-, Z2-
1.6
Differential mode
0
10
MHz
Differential mode
50
ns
ESD protection
Human body model
±1
kV
1
Encoder #1 differential input pins do not have internal
120Ω
termination resistors connected across
2
For full RS-422 compliance,
120Ω
termination resistors must be connected across the differential pairs, as close as possible to the
drive input pins. See
Figure 3.18. Differential incremental encoder #1
connection