Sun Microsystems Sun Blade 100, Руководство по обслуживанию

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C-1
A P P E N D I X
C
Functional Description
This appendix provides a functional description of the Sun Blade 100 system.
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Section C.1 “System” on page C-1
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Section C.2 “Motherboard Components” on page C-3
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Section C.3 “Reset Types” on page C-9
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Section C.4 “Clocking” on page C-10
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Section C.5 “Power Control” on page C-11
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Section C.6 “Memory Architecture” on page C-14
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Section C.7 “Address Mapping” on page C-18
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Section C.8 “Interrupts” on page C-20
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Section C.9 “Power” on page C-20
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Section C.10 “Motherboard” on page C-22
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Section C.11 “Riser Board” on page C-24
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Section C.12 “Jumper Descriptions” on page C-25
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Section C.13 “Enclosure” on page C-26
C.1 System
The Sun Blade 100 system is an UltraSPARC port architecture-based uniprocessor
machine that uses the peripheral component interconnect (PCI) as the I/O bus. The
CPU and ATI graphics ASIC communicate with each other using the UPA64S and
PCI protocols.
The following figure shows a functional block diagram of the system.