Chapter 3
Hardware Configuration
65
You must physically remove a CPU/Memory board from the system before you can
install or remove DIMMs. The DIMMs must be added four-at-a-time within the same
DIMM group, and each group used must have four identical DIMMs installed—that
is, all four DIMMs in the group must be from the same manufacturing vendor and
must have the same capacity (for example, four 128-Mbyte DIMMs, four 256-Mbyte
DIMMs, or four 512-Mbyte DIMMs).
Note –
Each CPU/Memory board must be populated with a minimum of eight
DIMMs, installed in groups A0 and B0.
Memory Interleaving
You can maximize the system’s memory bandwidth by taking advantage of its
memory interleaving capabilities. Sun Fire 880 systems support two-way, four-way,
and eight-way memory interleaving. In most cases, higher interleaving factors result
in greater system performance. However, actual performance results may vary
depending on the system application.
The system’s interleaving capabilities are summarized as follows:
■
Memory interleaving is limited to memory within the same CPU/Memory board.
Memory interleaving between CPU/Memory boards is not supported.
■
Eight-way interleaving occurs automatically when all 16 DIMM slots in a
CPU/Memory board are filled with identical capacity DIMMs (16 identical
DIMMs).
■
Four-way interleaving occurs automatically between any two DIMM groups that
are configured identically (eight identical capacity DIMMs).
■
Two-way interleaving occurs automatically in any DIMM group where the DIMM
capacities do not match the capacities used in any other group.
Independent Memory Subsystems
Each Sun Fire 880 CPU/Memory board contains two independent memory
subsystems (one per UltraSPARC III CPU). Memory controller logic incorporated
into the UltraSPARC III CPU allows each CPU to control its own memory
subsystem. One CPU controls DIMM groups A0 and A1, while the other CPU
controls DIMM groups B0 and B1.
The Sun Fire 880 system uses a shared memory architecture. During normal system
operations, the total system memory is shared by all CPUs in the system. However,
in the event of a CPU failure, the two DIMM groups associated with the failed CPU
become unavailable to all other CPUs in the system.
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