SRS Labs SR430, Руководство пользователя

Страница: 118 / 146

117 117 117
Circuit Description
Only keyboards which operate in the PC or 8088
mode will function with this interface.
SPIN KNOB
The knob is an optical encoder buffered by U612.
Each transition of its outputs is clocked into U610
or U611 and generates an interrupt at the output
of U602A. The processor keeps track of the knob's
position continuously.
SPEAKER
The speaker is driven by a timer on the 80C186.
The timer outputs a square wave which is enabled
by U602B and drives the speaker through Q705.
CLOCK/CALENDAR
U702 is an MC146818 real time clock chip which
keeps track of time and date. The time base is a
32.768 kHz oscillator made by U706. Both U702
and U706 are battery backed up.
PRINTER INTERFACE
The printer interface allows screen displays to be
printed to Epson compatible printers. Output data
is buffered by U703, an LS octal latch. Output con-
trol bits are buffered by the open collector driver
U704, and input control bits are discriminated by
U705C and U705D.
VIDEO GRAPHICS INTERFACE
The video graphics interface is centered around
U810, an HD63484 graphics controller. The
HD63484 generates the video sync signals, con-
trols the video memory, and draws graphic primi-
tives such as lines, circles, polygons,etc., and oth-
er high level functions. The HD63484 relieves the
80C186 from having to calculate each video image
and greatly increases display speed.
U813 and U814 are 32kbyte RAMs which make up
the 64k video memory. The video screen is 640H
by 480V and requires 38,400 bytes of memory.
The remaining memory is used to store patterns,
fonts, and other graphic objects. The data and ad-
dress are multiplexed and U811 and U182 are the
address latches.
Data is read 16 bits at a time. When data is re-
quired for the display, the 16 bits of data are
latched into U804 and U809 which are parallel to
serial converters. The video data is then shifted
out at 13.5 MHz and synchronized by U806B.
U803C blanks the video data except during active
display times.
Memory is accessed twice during each display cy-
cle. The first access reads the 16 bits of video
data for the current display cycle. The second ac-
cess is used by the controller for drawing purpos-
es. During the drawing access, data at any ad-
dress may be read or written. This allows drawing
to take place as fast as possible.
Commands and data are sent from the 80C186 to
the HD63484 using a DMA channel. This allows
the HD63484 to process commands without hav-
ing to wait for the 80C186 to send them.
DISK CONTROLLER
U907 is a DP8473 disk controller which integrates
all of the functions of the PC interface into a single
IC. All motor controls, read and write signals, and
data are all controlled by the DP8473. A DMA
channel is used to send and receive data from the
controller in order to satisfy the disk drive timing.
GPIB INTERFACE
The GPIB (IEEE-488) interface is provided by
U902, a TMS9914A controller. U903 and U904
buffer data I/O to the GPIB connector. U902 is pro-
grammed to provide an interrupt to the processor
whenever there is bus activity addressed to the
unit.
RS232 INTERFACE
The SCN2641 UART, U905, provides all of the
UART functions as well as baud rate generation.
Standard baud rates up to 19.2k can be generated
from the 3.6864 MHz clock. U906 buffers the out-
going data and control signals. Incoming signals
are received by U705A and U705B. If the host
computer asserts DTR, RS232 data output from
the unit will cease.
The RS232 port is a DCE and may be connected
to a PC using a standard serial cable (not a "null
modem" cable).
EXPANSION CONNECTOR
All control of the data acquisition hardware is
through the signals on the 2 40-pin expansion con-
nectors.