Sony TA-DA9000ES, Руководство по обслуживанию

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119
TA-DA9000ES
6-86. IC PIN FUNCTION DESCRIPTION
•
DIGITAL BOARD IC2201 CXD9718Q (DSP1)
Pin No. Pin Name I/O Description
1 VSS
—
Ground terminal
2
XRST
I
System reset signal input from the main system controller “L”: reset
3
EXTIN
I
Master clock signal input terminal Not used
4
FS2
I
Sampling frequency selection signal input terminal Not used
5
VDDI
—
Power supply terminal (+2.6V)
6
FS1
I
Sampling frequency selection signal input terminal Not used
7
PLOCK
O
Internal PLL lock signal output terminal Not used
8
VSS
—
Ground terminal
9
MCLK1
I
System clock input terminal (13.5 MHz)
10
VDDI
—
Power supply terminal (+2.6V)
11
VSS
—
Ground terminal
12
MCLK2
O
System clock output terminal (13.5 MHz)
13
MS
I
Master/slave setting terminal “L”: internal clock, “H”: external clock
Fixed at “L” in this set
14 SCKOUT
O
Internal system clock output terminal Not used
15 LRCKI1 I
L/R sampling clock signal (44.1 kHz) input from the digital audio interface receiver, decimation
filter and i-link interface
16 VDDE
—
Power supply terminal (+3.3V)
17 BCKI1 I
Bit clock signal (2.8224 MHz) input from the digital audio interface receiver, decimation filter
and i-link interface
18
SDI1
I
Audio serial data input from the A/D converter and decimation filter
19
LRCKO
O
L/R sampling clock signal (44.1 kHz) output to the DSP2
20
BCKO
O
Bit clock signal (2.8224 MHz) output to the DSP2
21 VSS
—
Ground terminal
22 KFSIO
I
Audio clock signal input terminal
23 to 26 SDO1 to SDO4
O
Audio serial data output to the DSP2
27
SPDIF
O
SPDIF signal output terminal Not used
28 LRCKI2 I
L/R sampling clock signal (44.1 kHz) input from the digital audio interface receiver, decimation
filter and i-link interface
29 BCKI2 I
Bit clock signal (2.8224 MHz) input from the digital audio interface receiver, decimation filter
and i-link interface
30 SDI2 I
Audio serial data input from the digital audio interface receiver, decimation filter and i-link
interface
31 VSS — Ground terminal
32 HACN O Acknowledge signal output to the main system controller
33 HDIN I Serial data input from the main system controller
34 HCLK I Serial data transfer clock signal input from the main system controller
35 HDOUT O Serial data output to the main system controller
36 HCS I Chip select input from the main system controller
37 SDCLK I Write signal input terminal Not used
38 CLKEN O SD-RAM chip enable output terminal Not used
39 RAS O Row address strobe signal output terminal Not used
40 VDDI — Power supply terminal (+2.6V)
41 VSS — Ground terminal
42 CAS O Column address strobe signal output terminal Not used
43 DQM/OE0 O Output terminal of data input/output mask Not used