Sony PEGA-CC5, Руководство по обслуживанию

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47
PEGA-CC5
Pin No. Pin Name I/O Description
54 RXD I UART serial receive data input from a CLIE
55 TXD O UART serial transmit data output to a CLIE
56 INT2 I Interrupt request signal input from the ASIC
57 NC — Not used
58 IRIN I UART serial receive data input terminal Not used
59 IROUT O UART serial transmit data output terminal Not used
60 VSS — Ground terminal
61 VDD — Power supply terminal (+3.3V)
62 CARDET I Carrier detection signal input terminal Not used
63 RXPWR O System reset signal output to the codec
64, 65 INT1, INT0 I Interrupt request signal input from the ASIC
66 VSS — Ground terminal
67 SCL O Serial data transfer clock signal output terminal Not used
68 SDI I Serial data input terminal Not used
69 SDO O Serial data output terminal Not used
70 VDD — Power supply terminal (+3.3V)
71 TESTCPU I For test terminal Normally fixed at “L”
72 TESTIN I For test terminal Normally fixed at “L”
73 VIDDONE O Not used
74 TESTAIU I ROM data bus size setting terminal “L”: 16 bit, “H”: 32bit
75 VSS — Ground terminal
76 VCC3 I Internal clock on control signal input
77 CS O Chip select signal output terminal
78 VDD — Power supply terminal (+3.3V)
79 C32KIN I System clock input terminal (32.768 kHz)
80 C32KOUT O System clock output terminal (32.768 kHz) Not used
81 VSS — Ground terminal
82 PWRCS O Internal clock on control signal output
83 PWRINT I Interrupt request signal input terminal Not used
84 PWROK I Power on/off control signal input terminal (connect to B+ line)
85 NC — Not used
86 ONBUTN I For power on control signal input from the ASIC
87 PON I Power on reset signal input from the ASIC
88 CPURES I CPU reset signal input terminal Not used
89 VDD — Power supply terminal (+3.3V)
90 DISPON O LCD display enable signal output terminal Not used
91 FRAME O For frame synchronize signal of between video module and LCD output terminal Not used
92 VSS — Ground terminal
93 DF O Clock signal output for internal A/D converter to the codec
94 LOAD O For line synchronize signal of between video module and LCD output terminal Not used
95 CP O Clock signal output for LCD Not used
96 VSS — Ground terminal
97 VDD — Power supply terminal (+3.3V)
98 to 101
VDAT0 to
VDAT3
O Data output for LCD Not used
102 VSS — Ground terminal