Date Code 20010731
Testing and Troubleshooting
11-29
SEL-352-1, -2 Instruction Manual
16. View the SER using the
SER
command. The VNpu timer setting is the time
between the assertion of 52AA and the assertion of KTRK.
F
LASHOVER
D
ETECTION
L
OGIC
, S
CHEME
1 L
OGIC
T
EST
Purpose: Verify Scheme 1 for current through an open breaker logic (Reference: Figure 3.21).
Method: 1. While the relay can use two different flashover detection schemes, only one is
enabled at a time. Select Scheme 1 by setting FOLOG = 1 in the relay setting
group. Using the
SET
command, set an output to close when the FOBF element
asserts, and set the SER to trigger for the elements listed below. Verify the
settings with the
SHO
command, and verify the
SHO G
command for TRIPA,
MCLOSE, and CLOSE.
Setting
Elements
FOLOG, FFpu,
FPpu, 59H, 87H,
50LD, 87FO,
TRIPA, CLOSE,
MCLOSE
50LD, 87HA, 87FOA, 87FOB, 87FOC, FOBF,
FOPF, CLOSE, MCLOSE, TRIPA
2. Connect an external timer, and set it to start when you apply A-phase current and
stop when the programmable output you set in Step 1 asserts.
3. Apply voltage at least 10 V higher than the 87H setting to the X-side voltage
inputs of the A-phase.
4. Turn the voltage source off (0.0 V) as you apply phase current above the 50LD
setting. This action should start the external timer.
5. Shortly after you apply A-phase current, the programmable output contact set in
Step 1 should close, indicating FOBF bit assertion. This action should stop the
external timer. Record the timer reading. It should be close to the FFpu setting.
6. Shut off A-phase current.
7. Repeat Steps 3, 4, and 6 four times. During the first repetition, assert the TRIPA
input before applying phase voltage. During the second repetition, assert the
CLOSE input (but not the TRIP input) before applying phase voltage. During the
third repetition, assert the MCLOSE input, with no other inputs asserted, before
applying phase voltage. On the fourth repetition, with no inputs asserted, reduce
the voltage in Step 4 to some voltage above the 87FO setting but below the 87H
setting. In these repetitions, the relay should not assert the FOBF bit.
8. Repeat Steps 3, 4, 5, 6, and 7 for B-phase and C-phase.
9. In Step 5, 62FP timer expiration can cause the relay to generate an event report.
You can set the FOPF bit in a programmable output contact mask, and perform
Steps 3, 4, 5, 6, and 7 for the flashover pending failure logic.
10. For each test, the relay generated a sequential events record for the elements
Содержание SEL-352-1
Страница 8: ......
Страница 10: ......
Страница 12: ......
Страница 30: ......
Страница 68: ......
Страница 186: ......
Страница 292: ......
Страница 300: ...9 8 Front Panel Interface Date Code 20010731 SEL 352 1 2 Instruction Manual Figure 9 3 Front Panel Operation Map ...
Страница 302: ......
Страница 368: ......
Страница 370: ......
Страница 374: ......
Страница 380: ......
Страница 382: ......
Страница 384: ......
Страница 386: ......
Страница 396: ......
Страница 404: ......
Страница 422: ......
Страница 442: ......